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documentation: Add DT binding document for ARM64 RAS
Add Device Tree binding document for the ARM64 RAS. Bug 3625675 Change-Id: If992f72a67e6269ae8e9b63863cf485c05cecff4 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2705398 GVS: Gerrit_Virtual_Submit
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Documentation/devicetree/bindings/arm/arm64-ras.yaml
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Documentation/devicetree/bindings/arm/arm64-ras.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/arm64-ras.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Device tree binding for ARMv8.2 RAS
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maintainers:
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- Laxman Dewangan <ldewangan@nvidia.com>
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description: |
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RAS are three aspects of the dependability of a system:
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Reliability: continuity of correct service
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Availability: readiness for correct service
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Serviceability: ability to undergo modifications and repairs
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ARMv8.2 provides RAS extensions to achieve the above features in a system.
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arm64_ras driver allows you to handle Correctable errors using per core
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Fault Handling Interrupt (or FHI). Un-correactable errors are handled by
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raising SError exception to kernel or Trusted Firmware(EL3) on CCLEX.
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The driver provides an API for CPU specific RAS drivers to
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register callbacks in case of FHI. When FHI occurs, the FHI
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ISR goes through the list of registered callbacks and executes
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them. Similarly, the driver allows registering SError callbacks
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for Un-correctable errors within Core, Core-Cluster & CCPLEX.
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When SError is reported, then those callbacks are scanned to
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find and report error in a Core, Cluster or CCPLEX
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properties:
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compatible:
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enum:
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- arm,armv8.2-ras
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interrupts:
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minItems: 1
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maxItems: 8
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description: |
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Represents per core Fault Handling Interrupt.
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required:
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- compatible
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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arm64_ras: arm64_ras {
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compatible = "arm,armv8.2-ras";
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interrupts = <0 392 0x04>,
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<0 393 0x04>,
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<0 394 0x04>,
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<0 395 0x04>,
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<0 396 0x04>,
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<0 397 0x04>,
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<0 398 0x04>,
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<0 399 0x04>;
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};
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...
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