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drm/tegra: Enable CRC generation on multimedia engines

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Enable CRC generation feature on VIC, OFA, and NVENC where
possible. Whether CRC generation can be enabled depends on
whether the engine's SEC register aperture is writable, based
on platform configuration.

The firewall configuration is for now determined in a hacky
way using ioremap, pending design decisions on how to do it
in a cleaner way.

Bug 4273775

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: Ia7507f4cce2b49703328d5dfdd74aaac8cff8153
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3120662
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mikko Perttunen
2024-03-26 04:20:55 +02:00
committed by mobile promotions
parent d7611d6efc
commit 8d8699b29e
3 changed files with 107 additions and 0 deletions
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33
drivers/gpu/drm/tegra/ofa.c
View File

@@ -18,7 +18,11 @@
#include <linux/pm_runtime.h>
#include <linux/reset.h>
#include <nvidia/conftest.h>
#include <soc/tegra/fuse-helper.h>
#include <soc/tegra/pmc.h>
#include <soc/tegra/tegra-cbb.h>
#include "drm.h"
#include "falcon.h"
@@ -32,6 +36,7 @@
#define OFA_TFBIF_ACTMON_ACTIVE_WEIGHT 0x1454
#define OFA_SAFETY_RAM_INIT_REQ 0x3320
#define OFA_SAFETY_RAM_INIT_DONE 0x3324
#define OFA_SEC_INTF_CRC_CTRL 0xe000
#define OFA_TFBIF_ACTMON_ACTIVE_MASK_STARVED BIT(0)
#define OFA_TFBIF_ACTMON_ACTIVE_MASK_STALLED BIT(1)
@@ -56,10 +61,31 @@ struct ofa {
struct devfreq *devfreq;
struct devfreq_dev_profile *devfreq_profile;
bool can_enable_crc;
/* Platform configuration */
const struct ofa_config *config;
};
static bool blf_write_allowed(u32 offset)
{
void __iomem *regs = ioremap(0x13a10000 + offset, 12);
u32 val;
val = readl(regs + 0x8);
if (!(val & 0x20000)) {
iounmap(regs);
return true;
}
val = readl(regs + 0x4);
iounmap(regs);
if (val & BIT(1))
return true;
return false;
}
static inline struct ofa *to_ofa(struct tegra_drm_client *client)
{
return container_of(client, struct ofa, client);
@@ -421,6 +447,9 @@ static __maybe_unused int ofa_runtime_resume(struct device *dev)
host1x_actmon_enable(&ofa->client.base);
if (ofa->can_enable_crc)
ofa_writel(ofa, 0x1, OFA_SEC_INTF_CRC_CTRL);
return 0;
disable:
@@ -589,6 +618,10 @@ static int ofa_probe(struct platform_device *pdev)
goto exit_actmon;
}
ofa->can_enable_crc =
!tegra_platform_is_silicon() ||
(ofa->config == &ofa_t234_config && blf_write_allowed(0x6960));
ofa->hwpm.dev = dev;
ofa->hwpm.regs = ofa->regs;
tegra_drm_hwpm_register(&ofa->hwpm, pdev->resource[0].start,