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8d8699b29e
Enable CRC generation feature on VIC, OFA, and NVENC where possible. Whether CRC generation can be enabled depends on whether the engine's SEC register aperture is writable, based on platform configuration. The firewall configuration is for now determined in a hacky way using ioremap, pending design decisions on how to do it in a cleaner way. Bug 4273775 Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Change-Id: Ia7507f4cce2b49703328d5dfdd74aaac8cff8153 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3120662 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>