nvadsp: Write chip id to h/w mailbox1

Need to communicate chip id info so that ast settings
can be enabled only for t186/t194 from ADSP. Hence,
HWMBOX1 is used to communicate the same

Bug 200684491

Change-Id: If7ae5f58fc410fd7cbb19c9e0129bead8740e88b
Signed-off-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2529141
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Asha Talambedu
2021-05-13 16:02:50 +05:30
committed by Laxman Dewangan
parent 5190a1db72
commit 8f504dc84e

View File

@@ -5,7 +5,7 @@
* Copyright (C) 2011 Texas Instruments, Inc.
* Copyright (C) 2011 Google, Inc.
*
* Copyright (C) 2014-2020, NVIDIA Corporation. All rights reserved.
* Copyright (C) 2014-2021, NVIDIA Corporation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -765,6 +765,9 @@ static void nvadsp_set_shared_mem(struct platform_device *pdev,
chip_id = tegra_get_chip_id();
os_args = &shared_mem->os_args;
/* Chip id info is communicated twice to ADSP
* TODO::clean up the redundant comm.
*/
os_args->chip_id = chip_id;
drv_data->shared_adsp_os_data = shared_mem;
@@ -1683,6 +1686,7 @@ int nvadsp_os_start(void)
struct device *dev;
int ret = 0;
static int cold_start = 1;
u8 chip_id;
if (!priv.pdev) {
pr_err("ADSP Driver is not initialized\n");
@@ -1721,6 +1725,25 @@ int nvadsp_os_start(void)
cold_start = 0;
}
if (drv_data->chip_data->hwmb.hwmbox1_reg != 0) {
chip_id = tegra_get_chip_id();
/* Write chip id info to HWMBOX1 to enable ast config
* later for t186/t196
*/
if (chip_id != 0) {
hwmbox_writel((uint32_t)chip_id,
drv_data->chip_data->hwmb.hwmbox1_reg);
} else {
dev_err(dev, "chip id is NULL\n");
ret = -EINVAL;
free_interrupts(&priv);
#ifdef CONFIG_PM
pm_runtime_put_sync(&priv.pdev->dev);
#endif
goto unlock;
}
}
ret = __nvadsp_os_start();
if (ret) {
priv.os_running = drv_data->adsp_os_running = false;