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ASoC: tegra-alt: Don't resume the I2S to update registers

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When configuring the I2S DAI format, setting the loopback mode and
setting the frame-sync width the I2S driver unnecessarily resumes the
I2S controller to update the registers. This is not necessary because
the driver uses regmap and so if the device is disabled, the regmap
will not update the actual registers until the I2S controller is
resumed.

Furthermore, it was observed that when the I2S controller DAI format
is set, by resuming the I2S controller momentarily, this causes some
of the I2S pins (SCLK and FS) to toggle. Although this is probably
harmless, it is better to only resume the I2S controller when it is
actually being used.

Bug 2414131

Change-Id: I9989deed67db83e6b23d278ba3a130a8661d722a
Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128015
(cherry picked from commit d8378bd21c39290072ad5d1e862d5386b2529a9f)
Reviewed-on: https://git-master.nvidia.com/r/2133385
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Jonathan Hunter
2019-05-29 17:16:43 +01:00
committed by Sameer Pujar
parent 91021c920e
commit 8f9baab4fa
1 changed files with 0 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
sound/soc/tegra-alt/tegra210_i2s_alt.c
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@@ -353,7 +353,6 @@ static int tegra210_i2s_set_fmt(struct snd_soc_dai *dai,
return -EINVAL;
}
pm_runtime_get_sync(dai->dev);
regmap_update_bits(i2s->regmap, TEGRA210_I2S_CTRL, mask, val);
/* FIXME: global enabling */
regmap_update_bits(i2s->regmap, TEGRA210_I2S_ENABLE,
@@ -361,7 +360,6 @@ static int tegra210_i2s_set_fmt(struct snd_soc_dai *dai,
regmap_update_bits(i2s->regmap, TEGRA210_I2S_CTRL,
TEGRA210_I2S_CTRL_FSYNC_WIDTH_MASK,
i2s->fsync_width << TEGRA210_I2S_CTRL_FSYNC_WIDTH_SHIFT);
pm_runtime_put(dai->dev);
i2s->format = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
@@ -800,11 +798,9 @@ static int tegra210_i2s_loopback_put(struct snd_kcontrol *kcontrol,
i2s->loopback = ucontrol->value.integer.value[0];
pm_runtime_get_sync(codec->dev);
regmap_update_bits(i2s->regmap, TEGRA210_I2S_CTRL,
TEGRA210_I2S_CTRL_LPBK_MASK,
i2s->loopback << TEGRA210_I2S_CTRL_LPBK_SHIFT);
pm_runtime_put(codec->dev);
return 0;
}
@@ -828,12 +824,10 @@ static int tegra210_i2s_fsync_width_put(struct snd_kcontrol *kcontrol,
i2s->fsync_width = ucontrol->value.integer.value[0];
pm_runtime_get_sync(codec->dev);
regmap_update_bits(i2s->regmap, TEGRA210_I2S_CTRL,
TEGRA210_I2S_CTRL_FSYNC_WIDTH_MASK,
i2s->fsync_width <<
TEGRA210_I2S_CTRL_FSYNC_WIDTH_SHIFT);
pm_runtime_put(codec->dev);
return 0;
}