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drivers: platform: dce: fix Coverity defects
Dereference after null check for pointers cl and handlep. Add a null check before referencing cl and handlep. Check return value of request_firmware for error. Using uninitialized value event when calling dce_worker_thread_wait. Add EVENT_ID_DCE_INVALID_EVENT and have a check before using the value event. CID 10127898 CID 10127999 CID 10127954 CID 10127811 Bug 3461002 Change-Id: If00ece28fd52e495b3a8d3eec7bdb4825d3c7892 Signed-off-by: Prateek Patel <prpatel@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2661588 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Laxman Dewangan
parent
b2d304096e
commit
9b5416fd50
@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -29,7 +29,7 @@
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int dce_admin_ipc_wait(struct tegra_dce *d, u32 w_type)
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{
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int ret = 0;
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enum dce_worker_event_id_type event;
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enum dce_worker_event_id_type event = EVENT_ID_DCE_INVALID_EVENT;
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struct admin_rpc_post_boot_info *admin_rpc = &d->admin_rpc;
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switch (w_type) {
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@@ -50,13 +50,19 @@ int dce_admin_ipc_wait(struct tegra_dce *d, u32 w_type)
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0);
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atomic_set(&admin_rpc->complete, 0);
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} else {
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dce_worker_thread_wait(d, event);
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if (event != EVENT_ID_DCE_INVALID_EVENT)
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dce_worker_thread_wait(d, event);
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else {
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dce_err(d, "Invalid event type [%d]", event);
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ret = -1;
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goto end;
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}
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}
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if (dce_worker_get_state(d)
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== STATE_DCE_WORKER_ABORTED)
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ret = -1;
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end:
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return ret;
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -140,6 +140,18 @@ int tegra_dce_register_ipc_client(u32 type,
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struct tegra_dce_client_ipc *cl;
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u32 handle = DCE_CLIENT_IPC_HANDLE_INVALID;
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if (handlep == NULL) {
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dce_err(d, "Invalid handle pointer");
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ret = -EINVAL;
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goto end;
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}
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if (type >= DCE_CLIENT_IPC_TYPE_MAX) {
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dce_err(d, "Failed to retrieve client info for type: [%u]", type);
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ret = -EINVAL;
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goto end;
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}
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int_type = dce_interface_type_map[type];
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d = dce_ipc_get_dce_from_ch(int_type);
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@@ -148,12 +160,6 @@ int tegra_dce_register_ipc_client(u32 type,
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goto out;
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}
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if (handlep == NULL) {
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dce_err(d, "Invalid handle pointer");
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ret = -EINVAL;
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goto out;
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}
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ret = dce_client_ipc_handle_alloc(&handle);
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if (ret)
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goto out;
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@@ -184,7 +190,7 @@ out:
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}
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*handlep = handle;
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end:
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return ret;
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}
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EXPORT_SYMBOL(tegra_dce_register_ipc_client);
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@@ -309,8 +315,12 @@ static void dce_client_process_event_ipc(struct tegra_dce *d,
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u32 msg_length;
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int ret = 0;
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if ((cl == NULL) || (cl->callback_fn == NULL) ||
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(cl->type != DCE_CLIENT_IPC_TYPE_RM_EVENT)) {
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if ((cl == NULL) || (cl->callback_fn == NULL)) {
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dce_err(d, "Invalid arg tegra_dce_client_ipc");
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return;
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}
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if (cl->type != DCE_CLIENT_IPC_TYPE_RM_EVENT) {
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dce_err(d, "Invalid arg for DCE_CLIENT_IPC_TYPE_RM_EVENT type:[%u]", cl->type);
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return;
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -159,7 +159,10 @@ struct dce_firmware *dce_request_firmware(struct tegra_dce *d,
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if (!fw)
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return NULL;
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request_firmware(&l_fw, fw_name, dev);
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if (request_firmware(&l_fw, fw_name, dev) < 0) {
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dce_err(d, "FW Request Failed");
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goto err;
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}
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if (!l_fw)
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goto err;
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -25,6 +25,7 @@ struct tegra_dce;
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* events thoughout the life cycle of dce worker thread.
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*/
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enum dce_worker_event_id_type {
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EVENT_ID_DCE_INVALID_EVENT = -1,
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EVENT_ID_DCE_BOOT_COMPLETE_IRQ_REQ_SET = 0,
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EVENT_ID_DCE_BOOT_COMPLETE_IRQ_RECEIVED = 1,
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EVENT_ID_DCE_IPC_SYNC_TRIGGERED = 2,
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