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PCT: Create devicetree validation schema
This is the output of the automated scripts created to parse the dtb and dts files congruently Jira ESDP-27666 Change-Id: Ic82a3f813bcbe6e78ba5f9b68875293c5d4bc6d7 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3274878 Tested-by: Mark Mendez <mmendez@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
This commit is contained in:
Mark Mendez
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# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms and conditions of the GNU General Public License,
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# version 2, as published by the Free Software Foundation.
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#
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# This program is distributed in the hope it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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# more details.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sdhci@810c570000/nvidia,tegra264-sdhci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: FIXME -- add title
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maintainers:
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- FIXME -- add maintainers
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description: |
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the compatability = nvidia,tegra264-sdhci is mentioned in the following drivers
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- <TOP>/kernel/kernel-oot/drivers/mmc/host/sdhci-tegra.c
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The following nodes use this compatibility
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- /bus@0/sdhci@810c570000
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select:
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properties:
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compatible:
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minItems: 2
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maxItems: 2
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items:
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enum:
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- nvidia,tegra264-sdhci
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- nvidia,tegra194-sdhci
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required:
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- compatible
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properties:
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reg:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Registers are given by a tuple of two values:
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- register address:
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- register block size.
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items:
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minItems: 4
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maxItems: 4
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x81
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maximum: 0x81
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0xc570000
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maximum: 0xc570000
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x10000
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maximum: 0x10000
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interrupts:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Interrupts are give by a tuple of 3 values:
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- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
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definitions in dt-bindings/interrupt-controller/arm-gic.h
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- interrupt number
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- trigger type (rising edge, falling edge, both, etc)
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definitions in dt-bindings/interrupt-controller/irq.h
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items:
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0xa2
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maximum: 0xa2
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x4
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maximum: 0x4
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sd-uhs-sdr104:
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$ref: "/schemas/types.yaml#/definitions/flag"
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sd-uhs-sdr50:
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$ref: "/schemas/types.yaml#/definitions/flag"
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sd-uhs-sdr25:
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$ref: "/schemas/types.yaml#/definitions/flag"
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sd-uhs-sdr12:
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$ref: "/schemas/types.yaml#/definitions/flag"
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mmc-hs200-1_8v:
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$ref: "/schemas/types.yaml#/definitions/flag"
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iommus:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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iommus are given by a tuple of 2 values:
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- Phandle to the device
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- Device ID
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x1200
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maximum: 0x1200
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dma-coherent:
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$ref: "/schemas/types.yaml#/definitions/flag"
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nvidia,pad-autocal-pull-up-offset-3v3-timeout:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x7
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maximum: 0x7
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nvidia,pad-autocal-pull-down-offset-3v3-timeout:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x7
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maximum: 0x7
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nvidia,pad-autocal-pull-up-offset-1v8-timeout:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x6
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maximum: 0x6
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nvidia,pad-autocal-pull-down-offset-1v8-timeout:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x7
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maximum: 0x7
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nvidia,pad-autocal-pull-up-offset-sdr104:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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nvidia,pad-autocal-pull-down-offset-sdr104:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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interconnects:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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items:
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minItems: 3
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maxItems: 3
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x1c2
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maximum: 0x1c3
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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interconnect-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- dma-mem
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- write
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pinctrl-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- sdmmc-3v3
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- sdmmc-1v8
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pinctrl-0:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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pinctrl-1:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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nvidia,default-tap:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x6
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maximum: 0x6
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nvidia,default-trim:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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assigned-clocks:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x95
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maximum: 0x96
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assigned-clock-parents:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x93
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maximum: 0x95
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resets:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Resets are given by a tuple of 2 values:
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- Phandle to the device
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- Reset ID
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x22
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maximum: 0x22
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reset-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- sdhci
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clocks:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Clocks are given by a tuple of 2 values:
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- Phandle to the device
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- Clock ID
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x96
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maximum: 0x97
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clock-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- sdhci
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- tmclk
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required:
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- compatible
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- reg
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- interrupts
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- iommus
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- resets
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- reset-names
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- clocks
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- clock-names
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examples:
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- |
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sdhci@810c570000 {
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compatible = "nvidia,tegra264-sdhci, nvidia,tegra194-sdhci";
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status = "disabled";
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reg = <0x81 0xc570000 0x00 0x10000>;
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interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
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sd-uhs-sdr104;
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sd-uhs-sdr50;
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sd-uhs-sdr25;
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sd-uhs-sdr12;
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mmc-hs200-1_8v;
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iommus = <&smmu2_mmu TEGRA_SID_SDMMC0>;
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dma-coherent;
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nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
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nvidia,pad-autocal-pull-down-offset-3v3-timeout = <0x07>;
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nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
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nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x07>;
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nvidia,pad-autocal-pull-up-offset-sdr104 = <0x00>;
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nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>;
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interconnects = <&mc TEGRA264_MEMORY_CLIENT_SDMMC0R &emc>,
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<&mc TEGRA264_MEMORY_CLIENT_SDMMC0W &emc>;
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interconnect-names = "dma-mem, write";
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pinctrl-names = "sdmmc-3v3, sdmmc-1v8";
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pinctrl-0 = <&sdmmc1_3v3>;
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pinctrl-1 = <&sdmmc1_1v8>;
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nvidia,default-tap = <6>;
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nvidia,default-trim = <0>;
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assigned-clocks = <&bpmp TEGRA264_CLK_SDMMC1>,
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<&bpmp TEGRA264_CLK_PLLC4_MUXED>;
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assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLC4_MUXED>,
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<&bpmp TEGRA264_CLK_PLLC4_OUT0>;
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resets = <&bpmp TEGRA264_RESET_SDMMC1>;
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reset-names = "sdhci";
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clocks = <&bpmp TEGRA264_CLK_SDMMC1>,
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<&bpmp TEGRA264_CLK_SDMMC_LEGACY_TM>;
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clock-names = "sdhci, tmclk";
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};
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