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PCT: Create devicetree validation schema
This is the output of the automated scripts created to parse the dtb and dts files congruently Jira ESDP-27666 Change-Id: Ic82a3f813bcbe6e78ba5f9b68875293c5d4bc6d7 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3274878 Tested-by: Mark Mendez <mmendez@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
This commit is contained in:
Mark Mendez
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# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms and conditions of the GNU General Public License,
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# version 2, as published by the Free Software Foundation.
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#
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# This program is distributed in the hope it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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# more details.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/tachometer@810c5c0000/nvidia,pwm-tegra264-tachometer.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: FIXME -- add title
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maintainers:
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- FIXME -- add maintainers
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description: |
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the compatability = nvidia,pwm-tegra264-tachometer is mentioned in the following drivers
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- <TOP>/kernel/nvidia-oot/drivers/pwm/pwm-tegra-tachometer.c
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The following nodes use this compatibility
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- /bus@0/tachometer@810c5c0000
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select:
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properties:
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compatible:
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minItems: 1
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maxItems: 1
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items:
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enum:
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- nvidia,pwm-tegra264-tachometer
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required:
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- compatible
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properties:
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reg:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Registers are given by a tuple of two values:
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- register address:
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- register block size.
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items:
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minItems: 4
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maxItems: 4
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x81
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maximum: 0x81
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0xc5c0000
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maximum: 0xc5c0000
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x10
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maximum: 0x10
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'#pwm-cells':
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x2
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maximum: 0x2
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clocks:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Clocks are given by a tuple of 2 values:
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- Phandle to the device
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- Clock ID
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x158
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maximum: 0x158
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resets:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Resets are given by a tuple of 2 values:
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- Phandle to the device
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- Reset ID
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x2c
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maximum: 0x2c
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clock-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- tach
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reset-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- tach
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pulse-per-rev:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x2
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maximum: 0x2
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capture-window-length:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x2
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maximum: 0x2
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disable-clk-gate:
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$ref: "/schemas/types.yaml#/definitions/flag"
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required:
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- compatible
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- reg
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- clocks
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- resets
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- clock-names
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- reset-names
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examples:
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- |
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tachometer@810c5c0000 {
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compatible = "nvidia,pwm-tegra264-tachometer";
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status = "disabled";
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reg = <0x81 0x0c5c0000 0x0 0x10>;
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#pwm-cells = <2>;
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clocks = <&bpmp TEGRA264_CLK_CLK1M>;
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resets = <&bpmp TEGRA264_RESET_TACH0>;
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clock-names = "tach";
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reset-names = "tach";
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pulse-per-rev = <2>;
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capture-window-length = <2>;
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disable-clk-gate;
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};
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146
Documentation/devicetree/bindings/pwm/nvidia,tegra264-pwm.yaml
Normal file
146
Documentation/devicetree/bindings/pwm/nvidia,tegra264-pwm.yaml
Normal file
@@ -0,0 +1,146 @@
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# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms and conditions of the GNU General Public License,
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# version 2, as published by the Free Software Foundation.
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#
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# This program is distributed in the hope it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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# more details.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pwm@c6a0000/nvidia,tegra264-pwm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: FIXME -- add title
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maintainers:
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- FIXME -- add maintainers
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description: |
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the compatability = nvidia,tegra264-pwm is mentioned in the following drivers
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- <TOP>/kernel/kernel-oot/drivers/pwm/pwm-tegra.c
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The following nodes use this compatibility
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- /bus@0/pwm@c6a0000
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- /bus@0/pwm@810c5e0000
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- /bus@0/pwm@810c5f0000
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- /bus@0/pwm@810c600000
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- /bus@0/pwm@810c610000
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- /bus@0/pwm@810c620000
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select:
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properties:
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compatible:
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minItems: 1
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maxItems: 1
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items:
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enum:
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- nvidia,tegra264-pwm
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required:
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- compatible
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properties:
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reg:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Registers are given by a tuple of two values:
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- register address:
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- register block size.
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items:
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minItems: 4
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maxItems: 4
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x81
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0xc5e0000
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maximum: 0xc6a0000
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x10000
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maximum: 0x10000
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nvidia,hw-instance-id:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x2
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maximum: 0xa
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clocks:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Clocks are given by a tuple of 2 values:
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- Phandle to the device
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- Clock ID
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x16
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maximum: 0xa0
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'#pwm-cells':
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x2
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maximum: 0x2
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resets:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Resets are given by a tuple of 2 values:
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- Phandle to the device
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- Reset ID
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items:
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minItems: 2
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maxItems: 2
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x17
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maximum: 0x1c
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reset-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- pwm
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clock-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- pwm
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- pll_aon
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- parent
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required:
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- compatible
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- reg
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- clocks
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- resets
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- reset-names
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- clock-names
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examples:
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- |
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pwm@c6a0000 {
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compatible = "nvidia,tegra264-pwm";
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status = "disabled";
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reg = <0x0 0xc6a0000 0x0 0x10000>;
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nvidia,hw-instance-id = <0x4>;
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clocks = <&bpmp TEGRA264_CLK_PWM4>;
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#pwm-cells = <2>;
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resets = <&bpmp TEGRA264_RESET_PWM4>;
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reset-names = "pwm";
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};
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