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video: tegra: host: nvdla: set EMC rate on device open

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Currently,
 - On device node close, nvhost ACM updates clock rate
   to default rate.
 - DLA default rate is set to UINT_MAX.
 - These causes max rate requests from DLA on device node close.

Fix,
 - Set default rate for DLA as zero. On device node close, aggregrate
   requests capped.
 - On device node open, keep EMC requests to max.
   so DLA inference doesn't impact for perf.

Bug 2769574

Change-Id: Icdaa8943ee143a5fa8c7310db9b7fac636c5be50
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: nmalwade <nmalwade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2255718
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Shridhar Rasal
2019-12-05 18:21:39 +08:00
committed by Laxman Dewangan
parent 70734cedf3
commit aaf11d61f1
1 changed files with 17 additions and 1 deletions
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18
drivers/video/tegra/host/nvdla/nvdla_ioctl.c
View File

@@ -1125,7 +1125,7 @@ static int nvdla_open(struct inode *inode, struct file *file)
struct platform_device *pdev = pdata->pdev;
struct nvdla_device *nvdla_dev = pdata->private_data;
struct nvdla_private *priv;
int err = 0;
int err = 0, index;
priv = kmalloc(sizeof(*priv), GFP_KERNEL);
if (unlikely(priv == NULL)) {
@@ -1143,6 +1143,22 @@ static int nvdla_open(struct inode *inode, struct file *file)
if (err < 0)
goto err_add_client;
/* set rate for EMC to max
* on device release ACM sets to default rate
*/
for (index = 0; index < NVHOST_MODULE_MAX_CLOCKS; index++) {
struct nvhost_clock *clock = &pdata->clocks[index];
if (clock->moduleid ==
NVHOST_MODULE_ID_EXTERNAL_MEMORY_CONTROLLER) {
err = nvhost_module_set_rate(pdev, priv, UINT_MAX,
index, clock->bwmgr_request_type);
if (err < 0)
goto err_alloc_queue;
break;
}
}
priv->queue = nvdla_queue_alloc(nvdla_dev->pool,
MAX_NVDLA_TASK_COUNT,
nvdla_dev->submit_mode == NVDLA_SUBMIT_MODE_CHANNEL);