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git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-24 18:21:35 +03:00
Revert "misc: Add EP client DMA sanity test driver"
This reverts commit ec12e025881e0a83912e800b128bec56ef0c0aa9. Reason for revert: Moving to tests-oot directory Bug 4865361 Change-Id: Ide1fb87f90fbf31c9445ce248d3f54dd60e2037e Signed-off-by: Srishti Goel <srgoel@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3246559 Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
This commit is contained in:
Srishti Goel
@@ -8,7 +8,6 @@ endif
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obj-m += nvsciipc/
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ifdef CONFIG_PCI
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obj-m += tegra-pcie-dma-test.o
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obj-m += tegra-pcie-dma-sanity-test.o
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endif
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obj-m += bluedroid_pm.o
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obj-m += nvscic2c-pcie/
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@@ -1,262 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#include <linux/debugfs.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pci-epc.h>
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#include <linux/pci-epf.h>
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#include <linux/random.h>
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#include <linux/tegra-pcie-dma-sanity-helpers.h>
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#include <soc/tegra/fuse-helper.h>
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#define MODULENAME "tegra_pcie_dma_sanity_test"
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/* Type definitions */
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struct ep_sanity_pvt {
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struct pci_dev *pdev;
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void __iomem *bar_virt;
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dma_addr_t bar_phy;
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void *rp_dma_virt;
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dma_addr_t rp_dma_phy;
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void *ep_dma_virt;
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dma_addr_t ep_dma_phy;
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struct dentry *debugfs;
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struct edmalib_sanity edma;
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u8 chip_id;
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u32 msi_irq;
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u64 msi_addr;
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u32 msi_data;
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};
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static int write_sanity_test(struct seq_file *s, void *data)
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{
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struct ep_sanity_pvt *ep = (struct ep_sanity_pvt *)dev_get_drvdata(s->private);
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struct pci_dev *pdev = ep->pdev;
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struct pci_dev *ppdev = pcie_find_root_port(pdev);
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/* Offset for header */
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u64 offset = (BAR0_DMA_BUF_OFFSET);
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uint32_t sizes[3] = {0.5 * SZ_1M, 2.5 * SZ_1M, 6.25 * SZ_1M};
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char *sizes_string[3] = {"1 MB", "5 MB", "12.5 MB"};
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int ret, i;
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/* Add relevant details here, and then call the common edmalib_sanity_tester */
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ep->edma.fdev = &ep->pdev->dev;
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ep->edma.priv = (void *)ep;
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/* RP -> EP */
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ep->edma.src_dma_addr = ep->rp_dma_phy + offset;
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ep->edma.dst_dma_addr = ep->bar_phy + offset;
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ep->edma.src_virt = ep->rp_dma_virt + offset;
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ep->edma.dst_virt = ep->bar_virt + offset;
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ep->edma.cdev = &ppdev->dev;
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if (ep->chip_id == TEGRA264) {
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ep->edma.msi_addr = ep->msi_addr;
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ep->edma.msi_data = ep->msi_data;
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ep->edma.msi_irq = ep->msi_irq;
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}
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ep->edma.stress_count = 10;
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ep->edma.nents = 2;
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ep->edma.edma_ch_type = TEGRA_PCIE_DMA_CHAN_XFER_ASYNC;
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for (i = 0; i < ARRAY_SIZE(sizes); i++) {
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dev_info(ep->edma.fdev, "%s ----- TESTING WITH TRANSFER SIZE %s -----\n",
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__func__, sizes_string[i]);
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ep->edma.dma_size = sizes[i];
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if (ep->edma.dma_size == (12.5 * SZ_1M))
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ep->edma.deinit_dma = true;
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ret = edmalib_sanity_tester(&ep->edma);
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if (ret) {
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dev_err(ep->edma.fdev, "%s: Failed at total transfer size = %s | ERROR: %d\n",
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__func__, sizes_string[i], ret);
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return ret;
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}
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}
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return 0;
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}
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static void init_debugfs_sanity(struct ep_sanity_pvt *ep)
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{
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debugfs_create_devm_seqfile(&ep->pdev->dev, "write_sanity_test", ep->debugfs,
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write_sanity_test);
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}
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static int tegra_pcie_dma_sanity_test_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct ep_sanity_pvt *ep;
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struct pcie_epf_bar *epf_bar;
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struct pci_dev *ppdev = pcie_find_root_port(pdev);
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int ret = 0;
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char *name;
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u8 bar;
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u32 val;
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u16 val_16;
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/* Allocate the device space on the CPU memory space */
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ep = devm_kzalloc(&pdev->dev, sizeof(*ep), GFP_KERNEL);
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if (!ep)
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return -ENOMEM;
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/* Chip-ID */
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ep->chip_id = __tegra_get_chip_id();
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if (ep->chip_id == TEGRA234)
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ep->edma.chip_id = NVPCIE_DMA_SOC_T234;
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else
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ep->edma.chip_id = NVPCIE_DMA_SOC_T264;
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/* Allocate space for the Linked-List */
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ep->edma.ll_desc = devm_kzalloc(&pdev->dev, sizeof(*ep->edma.ll_desc) * NUM_EDMA_DESC,
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GFP_KERNEL);
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if (!ep->edma.ll_desc)
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return -ENOMEM;
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/* Link the device space to the device */
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ep->pdev = pdev;
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pci_set_drvdata(pdev, ep);
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/* Enable the PCI device */
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ret = pci_enable_device(pdev);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to enable the PCI device\n");
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return ret;
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}
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/* Enable bus-mastering using pci_set_master()*/
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pci_set_master(pdev);
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/* Request regions for the EP */
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ret = pci_request_regions(pdev, MODULENAME);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to request PCI regions\n");
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goto fail_region_request;
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}
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/* pci_resource_start for the bus starting address of bar0 for orin, bar2 for thor*/
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if (ep->chip_id == TEGRA234)
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bar = 0;
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else
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bar = 2;
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ep->bar_phy = pci_resource_start(pdev, bar);
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/* Remap bar to IO using Write-Combine caching. This allows the DMA to write to
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* memory in bursts rather than with every transaction initiated
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*/
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ep->bar_virt = devm_ioremap_wc(&pdev->dev, ep->bar_phy, pci_resource_len(pdev, (u32)bar));
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if (!ep->bar_virt) {
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dev_err(&pdev->dev, "Failed to remap to IO\n");
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ret = -ENOMEM;
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goto fail_region_remap;
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}
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/* Allocate and initialize shared control data BAR0 for both RP and EP */
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/* RP */
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ep->rp_dma_virt = dma_alloc_coherent(&ppdev->dev, BAR0_SIZE, &ep->rp_dma_phy, GFP_KERNEL);
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if (!ep->rp_dma_virt) {
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ret = -ENOMEM;
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goto fail_rp_dma_alloc;
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}
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dev_dbg(&pdev->dev, "DMA memory pdev IOVA: 0x%llx, size: %d\n", ep->rp_dma_phy, BAR0_SIZE);
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/* EP */
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ep->ep_dma_virt = dma_alloc_coherent(&pdev->dev, BAR0_SIZE, &ep->ep_dma_phy, GFP_KERNEL);
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if (!ep->ep_dma_virt) {
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ret = -ENOMEM;
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goto fail_ep_dma_alloc;
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}
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dev_dbg(&pdev->dev, "DMA memory pdev IOVA: 0x%llx, size: %d\n", ep->ep_dma_phy, BAR0_SIZE);
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epf_bar = (__force struct pcie_epf_bar *)ep->bar_virt;
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epf_bar->rp_phy_addr = ep->ep_dma_phy;
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if (ep->chip_id == TEGRA264) {
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/* Allocating MSI's for DMA used in thor */
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ret = pci_alloc_irq_vectors(pdev, 16, 16, PCI_IRQ_MSI);
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if (ret < 0) {
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ret = -ENODEV;
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goto fail_vectors;
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}
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/* Reading the msi_address, to write data and IRQ vector */
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pci_read_config_word(ppdev, ppdev->msi_cap + PCI_MSI_FLAGS, &val_16);
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if (val_16 & PCI_MSI_FLAGS_64BIT) {
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pci_read_config_dword(ppdev, ppdev->msi_cap + PCI_MSI_ADDRESS_HI, &val);
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ep->msi_addr = val;
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pci_read_config_word(ppdev, ppdev->msi_cap + PCI_MSI_DATA_64, &val_16);
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ep->msi_data = val_16;
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} else {
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pci_read_config_word(ppdev, ppdev->msi_cap + PCI_MSI_DATA_32, &val_16);
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ep->msi_data = val_16;
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}
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pci_read_config_dword(ppdev, ppdev->msi_cap + PCI_MSI_ADDRESS_LO, &val);
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ep->msi_addr = (ep->msi_addr << 32) | val;
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ep->msi_irq = pci_irq_vector(ppdev, TEGRA264_PCIE_DMA_MSI_LOCAL_VEC);
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ep->msi_data += TEGRA264_PCIE_DMA_MSI_LOCAL_VEC;
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}
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/* Set-up debugfs */
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name = devm_kasprintf(&ep->pdev->dev, GFP_KERNEL, "%s_pcie_dma_sanity_test",
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dev_name(&pdev->dev));
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if (!name) {
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dev_err(&pdev->dev, "%s: Fail to set debugfs name\n", __func__);
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ret = -ENOMEM;
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goto fail_name;
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}
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ep->debugfs = debugfs_create_dir(name, NULL);
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init_debugfs_sanity(ep);
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return ret;
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/* Failure labels: */
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fail_name:
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pci_free_irq_vectors(pdev);
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fail_vectors:
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dma_free_coherent(&pdev->dev, BAR0_SIZE, ep->ep_dma_virt, ep->ep_dma_phy);
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fail_ep_dma_alloc:
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dma_free_coherent(&ppdev->dev, BAR0_SIZE, ep->rp_dma_virt, ep->rp_dma_phy);
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fail_rp_dma_alloc:
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fail_region_remap:
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pci_release_regions(pdev);
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fail_region_request:
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pci_clear_master(pdev);
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return ret;
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}
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static void tegra_pcie_dma_sanity_test_remove(struct pci_dev *pdev)
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{
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struct ep_sanity_pvt *ep = pci_get_drvdata(pdev);
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struct pci_dev *ppdev = pcie_find_root_port(pdev);
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/* Remove the debugfs */
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debugfs_remove_recursive(ep->debugfs);
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/* Deinit the cookie */
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tegra_pcie_dma_deinit(&ep->edma.cookie);
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/* Free the IRQ */
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if (ep->chip_id == TEGRA264)
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pci_free_irq_vectors(pdev);
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/* Free the shared control data in bar0 of RP and EP */
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dma_free_coherent(&pdev->dev, BAR0_SIZE, ep->ep_dma_virt, ep->ep_dma_phy);
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dma_free_coherent(&ppdev->dev, BAR0_SIZE, ep->rp_dma_virt, ep->rp_dma_phy);
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/* Release the regions of EP */
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pci_release_regions(pdev);
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/* Undo the bus-mastering used for DMA */
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pci_clear_master(pdev);
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}
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static const struct pci_device_id ep_pci_tbl[] = {
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{ PCI_DEVICE(0x10DE, 0x229C) },
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{ PCI_DEVICE(0x10DE, 0x22D8) },
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{}
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}; /* List of recognised device IDs for this module */
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MODULE_DEVICE_TABLE(pci, ep_pci_tbl);
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static struct pci_driver ep_pci_driver = {
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.name = MODULENAME,
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.id_table = ep_pci_tbl,
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.probe = tegra_pcie_dma_sanity_test_probe,
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.remove = tegra_pcie_dma_sanity_test_remove,
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}; /* Module details of the pci driver */
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module_pci_driver(ep_pci_driver);
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MODULE_DESCRIPTION("Tegra PCIe client driver to test EP DMA functioning");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Srishti Goel <srgoel@nvidia.com>");
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