tegra-alt: admaif: flag ENABLE reg as volatile

ADMAIF channels used by ADSP are enabled/disable from ADSP.
So mark ENABLE register as volatile to avoid CPU writing
incorrect values into it.

Bug 200173637

Change-Id: Ic441d890e90dd087ae6bdd2a0b9ef8ceec0bb333
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/1013345
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
This commit is contained in:
Viraj Karandikar
2016-02-18 15:51:01 +05:30
committed by Sameer Pujar
parent d50bf8eeb6
commit b57470cec4

View File

@@ -142,7 +142,9 @@ static bool tegra210_admaif_rd_reg(struct device *dev, unsigned int reg)
static bool tegra210_admaif_volatile_reg(struct device *dev, unsigned int reg)
{
reg = reg % TEGRA210_ADMAIF_CHANNEL_REG_STRIDE;
if (reg > 0 && (reg < TEGRA210_ADMAIF_CHANNEL_COUNT *
TEGRA210_ADMAIF_CHANNEL_REG_STRIDE * 2))
reg = reg % TEGRA210_ADMAIF_CHANNEL_REG_STRIDE;
switch (reg) {
case TEGRA210_ADMAIF_XBAR_RX_STATUS:
@@ -151,6 +153,8 @@ static bool tegra210_admaif_volatile_reg(struct device *dev, unsigned int reg)
case TEGRA210_ADMAIF_XBAR_TX_INT_STATUS:
case TEGRA210_ADMAIF_XBAR_RX_SOFT_RESET:
case TEGRA210_ADMAIF_XBAR_TX_SOFT_RESET:
case TEGRA210_ADMAIF_XBAR_TX_ENABLE:
case TEGRA210_ADMAIF_XBAR_RX_ENABLE:
return true;
default:
break;