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camera: Add snapshot section & HSP PANIC cmd
- Add the snapshot section into the trace buffer header struct - Introduce a new HSP command which will be used to signal KMD about RCE halt. Jira CAMERASW-32243 Change-Id: I3890b30200b3a0a386939d432842269f4c1e1225 Signed-off-by: yizhou <yizhou@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3314382 Reviewed-by: Vincent Chung <vincentc@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Semi Malinen <smalinen@nvidia.com> Reviewed-by: Mohit Ingale <mohiti@nvidia.com> Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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/*
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* Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* Copyright (c) 2022-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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*/
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/**
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/**
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@@ -576,6 +576,31 @@
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*/
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*/
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#define CAMRTC_HSP_BOOT_COMPLETE MK_U32(0x4B)
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#define CAMRTC_HSP_BOOT_COMPLETE MK_U32(0x4B)
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/**
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* @brief PANIC message
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*
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* The CAMRTC_HSP_PANIC message message is a unidirectional message from RCE to client
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* to log that RCE is about to go into a bad state. This typically occurs when RCE
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* detects a critical hardware error or encounters an unrecoverable firmware state.
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*
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* Upon receiving this message, the client should dump out the trace buffer snapshot
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* section for debugging purposes.
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*
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* @pre @ref CAMRTC_HSP_HELLO exchange has been completed.
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*
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* @par Response
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* @rststar
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* +-------+---------------------------------------------------+
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* | Bits | Description |
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* +=======+===================================================+
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* | 30:24 | CAMRTC_HSP_PANIC |
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* +-------+---------------------------------------------------+
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* | 23:0 | 0x000000 |
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* +-------+---------------------------------------------------+
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* @endrst
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*/
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#define CAMRTC_HSP_PANIC MK_U32(0x4C)
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/** Reserved, not to be used. */
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/** Reserved, not to be used. */
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#define CAMRTC_HSP_RESERVED_5E MK_U32(0x5E) /* bug 200395605 */
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#define CAMRTC_HSP_RESERVED_5E MK_U32(0x5E) /* bug 200395605 */
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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/*
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* Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* Copyright (c) 2022-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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*/
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#ifndef INCLUDE_CAMRTC_TRACE_H
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#ifndef INCLUDE_CAMRTC_TRACE_H
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@@ -49,6 +49,15 @@
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#define CAMRTC_TRACE_EXCEPTION_OFFSET MK_U32(0x01000)
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#define CAMRTC_TRACE_EXCEPTION_OFFSET MK_U32(0x01000)
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#define CAMRTC_TRACE_EVENT_OFFSET MK_U32(0x10000)
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#define CAMRTC_TRACE_EVENT_OFFSET MK_U32(0x10000)
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/**
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* @brief Number of entries in the snapshot section
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*
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* The snapshot section stores system state captures that can be
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* used for debugging and diagnostics. The size is set to 0x400
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* entries to balance memory usage with debug information coverage.
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*/
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#define CAMRTC_TRACE_SNAPSHOT_ENTRIES MK_U32(0x400)
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/* Size of each entry */
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/* Size of each entry */
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#define CAMRTC_TRACE_EXCEPTION_SIZE MK_SIZE(1024)
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#define CAMRTC_TRACE_EXCEPTION_SIZE MK_SIZE(1024)
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#define CAMRTC_TRACE_EVENT_SIZE MK_SIZE(64)
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#define CAMRTC_TRACE_EVENT_SIZE MK_SIZE(64)
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@@ -87,13 +96,16 @@ struct camrtc_trace_memory_header {
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uint32_t event_offset;
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uint32_t event_offset;
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uint32_t event_size;
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uint32_t event_size;
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uint32_t event_entries;
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uint32_t event_entries;
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uint32_t reserved3;
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uint32_t snapshot_offset;
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uint32_t reserved4[0xc8 / 4];
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uint32_t snapshot_size;
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uint32_t snapshot_entries;
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uint32_t reserved4[0xc0 / 4];
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/* pointer: offset 0x100 */
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/* pointer: offset 0x100 */
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uint32_t exception_next_idx;
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uint32_t exception_next_idx;
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uint32_t event_next_idx;
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uint32_t event_next_idx;
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uint32_t reserved_ptrs[0x38 / 4];
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uint32_t snapshot_next_idx;
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uint32_t reserved_ptrs[0x34 / 4];
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} CAMRTC_TRACE_ALIGN;
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} CAMRTC_TRACE_ALIGN;
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/*
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/*
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