dt-bindings: tegra264: Update schemas

Update tegra264 schemas as follows:
 - correct nvidia,tegra264-rtc interrupts maxItems, minItems
 - correct tegra-spidev reg maxItems, minItems.
   add missing attributes into example.
 - fix compatible in example for nvidia,tegra186-spi-slave
 - document multi-master attribute in nvidia,tegra264-bpmp-i2c

Update year range in .yaml file(s) Copyright

Change-Id: Ibcafe16aa674975a7b74328d20f4f6e8f66b51fe
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3321635
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Bitan Biswas
2025-03-18 12:44:04 +00:00
committed by Jon Hunter
parent 376365d92f
commit e30d7b7f40
4 changed files with 17 additions and 13 deletions

View File

@@ -1,4 +1,4 @@
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms and conditions of the GNU General Public License,
@@ -43,6 +43,11 @@ properties:
minimum: 0x5
maximum: 0x5
multi-master:
$ref: "/schemas/types.yaml#/definitions/flag"
description: Enables retries if arbitration is lost. Currently, the
functionality is supported only by the Tegra264 BPMP firmware.
'#address-cells':
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0x1

View File

@@ -1,4 +1,4 @@
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms and conditions of the GNU General Public License,
@@ -68,9 +68,7 @@ properties:
interrupts:
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
description: |
Interrupts are give by a tuple of 3 values:
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
definitions in dt-bindings/interrupt-controller/arm-gic.h
Interrupts are give by a tuple of 2 values with interrupt-parent phandle:
- interrupt number
- trigger type (rising edge, falling edge, both, etc)
definitions in dt-bindings/interrupt-controller/irq.h

View File

@@ -1,4 +1,4 @@
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms and conditions of the GNU General Public License,
@@ -206,7 +206,7 @@ required:
examples:
- |
spi@810c460000 {
compatible = "nvidia,tegra234-spi, nvidia,tegra210-spi";
compatible = "nvidia,tegra186-spi-slave";
status = "disabled";
reg = <0x81 0x0c460000 0x0 0x10000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;

View File

@@ -1,4 +1,4 @@
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms and conditions of the GNU General Public License,
@@ -47,12 +47,10 @@ properties:
reg:
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
description: |
Registers are given by a tuple of two values:
- register address:
- register block size.
Register is specified as a value.
items:
minItems: 4
maxItems: 4
minItems: 1
maxItems: 1
items:
- $ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0x0
@@ -70,4 +68,7 @@ required:
examples:
- |
spi@0 {
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <0x2faf080>;
};