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git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 09:11:26 +03:00
[Vblk]: Get vcpu affinity from the DT node
mpidr will not give the correct HRO VPU when it is floorswept. The Change contains: [1] Get the VCPU affinity from the DT rather from mpidr. [2] Remove the Mpidr Logic Bug 4856912 Change-Id: I4d21ed90a8effc94fd3b12a977752b56b3915548 Signed-off-by: Gokul Vasan L J <gokull@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3213689 GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Tested-by: Gokul Vasan L J <gokull@nvidia.com> Reviewed-by: Vipin Kumar <vipink@nvidia.com> Reviewed-by: Sreenivas Velpula <svelpula@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3262165 Tested-by: Manish Bhardwaj <mbhardwaj@nvidia.com> Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com> Reviewed-by: Manish Bhardwaj <mbhardwaj@nvidia.com>
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@@ -64,11 +64,6 @@ static uint32_t total_instance_id;
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static int vblk_major;
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static uint32_t lcpu_to_vcpus[CPUS_PER_CLUSTER * MAX_NUM_CLUSTERS];
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atomic_t vcpu_init_info;
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static DEFINE_MUTEX(vcpu_lock);
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static struct semaphore mpidr_sem;
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static inline uint64_t _arch_counter_get_cntvct(void)
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{
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uint64_t cval;
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@@ -102,27 +97,6 @@ exit:
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return req;
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}
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static uint32_t convert_lcpu_to_vcpu(struct vblk_dev *vblkdev, uint32_t lcpu_affinity)
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{
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uint32_t cnt, vcpu = U32_MAX;
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int adj_lcpu = -1;
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/* search for vcpu corresponding to lcpu_affinity */
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for (cnt = 0; cnt < MAX_NUM_CLUSTERS * CPUS_PER_CLUSTER; cnt++) {
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if (lcpu_to_vcpus[cnt] != U32_MAX) {
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/* calculating adjusted lcpu */
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adj_lcpu++;
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if (adj_lcpu == lcpu_affinity) {
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vcpu = lcpu_to_vcpus[cnt];
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break;
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}
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}
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}
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return vcpu;
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}
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static struct vsc_request *vblk_get_req_by_sr_num(struct vblk_dev *vblkdev,
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uint32_t num)
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{
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@@ -1560,12 +1534,12 @@ static void vblk_init_device(struct work_struct *ws)
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return;
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}
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if (vblkdev->vcpu_affinity != U32_MAX) {
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if (vblkdev->schedulable_vcpu_number != num_possible_cpus()) {
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strncat(vblk_comm, ":%u", 3);
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/* create partition specific worker thread */
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vblkdev->vblk_kthread = kthread_create_on_cpu(&vblk_request_worker, vblkdev,
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vblkdev->vcpu_affinity, vblk_comm);
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vblkdev->schedulable_vcpu_number, vblk_comm);
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} else {
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/* create partition specific worker thread.
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* If the conversion is not successful
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@@ -1582,6 +1556,9 @@ static void vblk_init_device(struct work_struct *ws)
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/* set thread priority */
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attr.sched_policy = SCHED_RR;
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/*
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* FIXME: Need to review the priority level set currently <25.
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*/
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attr.sched_priority = VBLK_DEV_BASE_PRIORITY - vblkdev->config.priority;
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WARN_ON_ONCE(sched_setattr_nocheck(vblkdev->vblk_kthread, &attr) != 0);
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init_completion(&vblkdev->complete);
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@@ -1599,13 +1576,15 @@ static void vblk_init_device(struct work_struct *ws)
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static irqreturn_t ivc_irq_handler(int irq, void *data)
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{
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struct vblk_dev *vblkdev = (struct vblk_dev *)data;
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if (vblkdev->initialized)
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if (vblkdev->initialized) {
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/* wakeup worker thread */
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complete(&vblkdev->complete);
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else
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schedule_work_on(vblkdev->vcpu_affinity, &vblkdev->init);
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} else {
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int vcpu = (vblkdev->schedulable_vcpu_number != num_possible_cpus()) ?
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vblkdev->schedulable_vcpu_number : DEFAULT_INIT_VCPU;
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schedule_work_on(vcpu, &vblkdev->init);
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}
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return IRQ_HANDLED;
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}
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@@ -1660,72 +1639,13 @@ static void tegra_create_timers(struct vblk_dev *vblkdev)
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}
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static uint64_t read_mpidr(void)
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{
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uint64_t mpidr;
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__asm volatile("MRS %0, MPIDR_EL1 " : "=r"(mpidr) :: "memory");
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return mpidr;
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}
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static uint64_t read_mpidr_cluster(uint64_t mpidr)
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{
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return (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK;
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}
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static uint64_t read_mpidr_core(uint64_t mpidr)
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{
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return (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
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}
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static long get_cpu_info(void *data)
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{
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uint64_t l_mpidr, l_cluster, l_core;
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uint32_t lcpu;
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l_mpidr = read_mpidr();
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l_cluster = read_mpidr_cluster(l_mpidr);
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l_core = read_mpidr_core(l_mpidr);
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lcpu = l_cluster * CPUS_PER_CLUSTER + l_core;
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lcpu_to_vcpus[lcpu] = smp_processor_id();
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up(&mpidr_sem);
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return 0;
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}
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static void populate_lcpu_to_vcpu_info(struct vblk_dev *vblkdev)
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{
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uint32_t num_vcpus = num_present_cpus();
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uint32_t cnt, lcpu;
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/* initialize all clusters including holes */
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for (lcpu = 0; lcpu < MAX_NUM_CLUSTERS * CPUS_PER_CLUSTER; lcpu++)
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lcpu_to_vcpus[lcpu] = U32_MAX;
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/* queuing API on each present vcpus serially
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* by down and up semaphore operation
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*/
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for (cnt = 0; cnt < num_vcpus; cnt++) {
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down(&mpidr_sem);
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work_on_cpu(cnt, get_cpu_info, vblkdev);
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}
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/* down and up operation to make sure get_cpu_info API
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* gets exuected on last vcpu successfully before exiting function
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*/
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down(&mpidr_sem);
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up(&mpidr_sem);
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atomic_inc(&vcpu_init_info);
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}
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static int tegra_hv_vblk_probe(struct platform_device *pdev)
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{
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static struct device_node *vblk_node;
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struct device_node *schedulable_vcpu_number_node;
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struct vblk_dev *vblkdev;
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struct device *dev = &pdev->dev;
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uint32_t lcpu_affinity;
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uint8_t is_cpu_bound = true;
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int ret;
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if (!is_tegra_hypervisor_mode()) {
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@@ -1765,6 +1685,24 @@ static int tegra_hv_vblk_probe(struct platform_device *pdev)
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goto fail;
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}
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}
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schedulable_vcpu_number_node = of_find_node_by_name(NULL, "virt-storage-request-submit-cpu-mapping");
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/* read lcpu_affinity from dts */
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if (schedulable_vcpu_number_node == NULL) {
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dev_err(dev, "%s: virt-storage-request-submit-cpu-mapping DT not found\n",
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__func__);
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is_cpu_bound = false;
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} else if (of_property_read_u32(schedulable_vcpu_number_node, "lcpu2tovcpu", &(vblkdev->schedulable_vcpu_number)) != 0) {
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dev_err(dev, "%s: lcpu2tovcpu affinity is not found\n", __func__);
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is_cpu_bound = false;
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}
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if (vblkdev->schedulable_vcpu_number >= num_online_cpus()) {
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dev_err(dev, "%s: cpu affinity (%d) > online cpus (%d)\n", __func__, vblkdev->schedulable_vcpu_number, num_online_cpus());
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is_cpu_bound = false;
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}
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if (false == is_cpu_bound) {
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dev_err(dev, "%s: WARN: CPU is unbound\n", __func__);
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vblkdev->schedulable_vcpu_number = num_possible_cpus();
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}
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vblkdev->initialized = false;
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@@ -1778,7 +1716,6 @@ static int tegra_hv_vblk_probe(struct platform_device *pdev)
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spin_lock_init(&vblkdev->queue_lock);
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mutex_init(&vblkdev->ioctl_lock);
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mutex_init(&vblkdev->ivc_lock);
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sema_init(&mpidr_sem, 1);
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INIT_WORK(&vblkdev->init, vblk_init_device);
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INIT_WORK(&vblkdev->rq_cfg, vblk_request_config);
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@@ -1788,25 +1725,10 @@ static int tegra_hv_vblk_probe(struct platform_device *pdev)
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/* Create timers for each request going to storage server*/
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tegra_create_timers(vblkdev);
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mutex_lock(&vcpu_lock);
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if (atomic_read(&vcpu_init_info) == 0)
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populate_lcpu_to_vcpu_info(vblkdev);
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mutex_unlock(&vcpu_lock);
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/* read lcpu_affinity from dts */
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if (of_property_read_u32_index(vblkdev->device->of_node, "lcpu_affinity", 0,
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&lcpu_affinity)) {
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/* pin thread to logical core 2 if dts property is missing */
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lcpu_affinity = 2;
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}
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/* convert lcpu to vcpu */
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vblkdev->vcpu_affinity = convert_lcpu_to_vcpu(vblkdev, lcpu_affinity);
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schedule_work_on(vblkdev->vcpu_affinity, &vblkdev->rq_cfg);
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schedule_work_on(((is_cpu_bound == false) ? DEFAULT_INIT_VCPU : vblkdev->schedulable_vcpu_number),
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&vblkdev->rq_cfg);
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return 0;
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fail:
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return ret;
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}
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@@ -18,6 +18,8 @@
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#define DRV_NAME "tegra_hv_vblk"
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#define DEFAULT_INIT_VCPU (0U)
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/* Minor number and partition management. */
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#define VBLK_MINORS 32
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@@ -96,7 +98,7 @@ struct vblk_dev {
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struct list_head req_list; /* List containing req */
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uint32_t ivc_id;
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uint32_t ivm_id;
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uint32_t vcpu_affinity;
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uint32_t schedulable_vcpu_number; /* VCPU through which Req will be processed*/
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struct tegra_hv_ivc_cookie *ivck;
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struct tegra_hv_ivm_cookie *ivmk;
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uint32_t devnum;
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