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nvethernet: allow PHY read/write if MAC clks enabled

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Issue: During system suspend, PHY framework is trying to
access the PHY registers even though the ethernet interface
is not up which inturn causing the bus errors since MAC clocks
not enabled.

Fix: Add MAC clocks enable check before accessing the PHY
registers through MDIO bus.

Bug 200548320

Change-Id: Ic85ae82bbc7e7f33203cc94f8407bdfd23f75502
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2187285
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Narayan Reddy
2019-08-30 22:10:57 +05:30
committed by Revanth Kumar Uppala
parent 9b7d91fdcb
commit e97dbc8de1
2 changed files with 17 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
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@@ -49,6 +49,7 @@ static void ether_disable_clks(struct ether_priv_data *pdata)
if (!IS_ERR_OR_NULL(pdata->pllrefe_clk)) {
clk_disable_unprepare(pdata->pllrefe_clk);
}
pdata->clks_enable = false;
}
/**
@@ -107,6 +108,8 @@ static int ether_enable_clks(struct ether_priv_data *pdata)
}
}
pdata->clks_enable = true;
return 0;
err_tx:
@@ -2279,6 +2282,12 @@ static int ether_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
struct net_device *ndev = bus->priv;
struct ether_priv_data *pdata = netdev_priv(ndev);
if (!pdata->clks_enable) {
dev_err(pdata->dev,
"%s:No clks available, skipping PHY write\n", __func__);
return -ENODEV;
}
return osi_write_phy_reg(pdata->osi_core, (unsigned int)phyaddr,
(unsigned int)phyreg, phydata);
}
@@ -2303,6 +2312,12 @@ static int ether_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
struct net_device *ndev = bus->priv;
struct ether_priv_data *pdata = netdev_priv(ndev);
if (!pdata->clks_enable) {
dev_err(pdata->dev,
"%s:No clks available, skipping PHY read\n", __func__);
return -ENODEV;
}
return osi_read_phy_reg(pdata->osi_core, (unsigned int)phyaddr,
(unsigned int)phyreg);
}