gpu: host1x: ADD SID information for Tegra234 DLA

Add the SMMU SID information for the Tegra234 DLA devices to the
upstream host1x driver to ensure the SMMU is configured correctly.

Bug 3724727

Change-Id: I01edf2bc36f2b8a4b83077fc71f42463f9958a3d
Signed-off-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2754962
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Brad Griffis
2022-08-02 18:13:38 +00:00
committed by Laxman Dewangan
parent cc7156e561
commit ea0f4f6a26

View File

@@ -2,7 +2,7 @@
/*
* Tegra host1x driver
*
* Copyright (c) 2010-2013, NVIDIA Corporation.
* Copyright (c) 2010-2022, NVIDIA Corporation.
*/
#include <linux/clk.h>
@@ -268,6 +268,30 @@ static const struct host1x_sid_entry tegra234_sid_table[] = {
.offset = 0x34,
.limit = 0x34
},
{
/* NVDLA channel */
.base = 0x17e0,
.offset = 0x30,
.limit = 0x34
},
{
/* NVDLA MMIO */
.base = 0x16d8,
.offset = 0x0030,
.limit = 0x0034
},
{
/* NVDLA1 channel */
.base = 0x17e8,
.offset = 0x30,
.limit = 0x34
},
{
/* NVDLA1 MMIO */
.base = 0x16e0,
.offset = 0x0030,
.limit = 0x0034
},
};
static const struct host1x_info host1x08_info = {