gpu: host1x: Set up device DMA parameters

In order to store device DMA parameters, the DMA framework depends on
the device's dma_parms field to point at a valid memory location. Add
backing storage for this in struct host1x_memory_context and point to
it.

Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240916133320.368620-1-thierry.reding@gmail.com
(cherry picked from commit b4ad4ef374d66cc8df3188bb1ddb65bce5fc9e50)

Bug 4876974

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Change-Id: I0a7f9c9f49a5e4580193d5814ff4a6a15f8014c8
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3268196
(cherry picked from commit 027ee6a9a0b3848fbaae21c788064f59072c0978)
Signed-off-by: Paritosh Dixit <paritoshd@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3326864
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Thierry Reding
2024-09-16 15:33:20 +02:00
committed by mobile promotions
parent 8e353eecd4
commit eca775e222
2 changed files with 4 additions and 2 deletions

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021-2024, NVIDIA Corporation.
* SPDX-FileCopyrightText: Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
#include <linux/completion.h>
@@ -57,6 +57,7 @@ int host1x_memory_context_list_init(struct host1x *host1x)
ctx->dev.bus = &host1x_context_device_bus_type;
ctx->dev.parent = host1x->dev;
ctx->dev.dma_parms = &ctx->dma_parms;
dma_set_max_seg_size(&ctx->dev, UINT_MAX);
err = device_add(&ctx->dev);

View File

@@ -2,7 +2,7 @@
/*
* Host1x context devices
*
* Copyright (c) 2020, NVIDIA Corporation.
* SPDX-FileCopyrightText: Copyright (c) 2020-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
#ifndef __HOST1X_CONTEXT_H
@@ -28,6 +28,7 @@ struct host1x_hw_memory_context {
refcount_t ref;
struct pid *owner;
struct device_dma_parameters dma_parms;
struct device dev;
u64 dma_mask;
u32 stream_id;