nv-tegra-mirror/linux-nv-oot
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nv-oot.git synced 2025-12-23 17:55:05 +03:00
Code Issues Packages Projects Releases Wiki Activity

nvethernet: add EQOS monitoring Rx clks

Browse Source 
BPMP-FW exposes the following EQOS RX clocks:

o eqos_rx_input [external input clock from EQOS pad]
o eqos_rx [external input clock after RX clock gate]
o eqos_rx_m [monitoring clock: virtual clock that controls RX clock FMON]
o eqos_macsec_rx  [external input clock after RX MACSEC clock gate
  (separate gate from RX gate)]

To enable RX clock FMON -
o Issue clk_set_rate on EQOS_RX_INPUT
o Clk_enable for EQOS_RX_CLK and EQOS_RX_M

Bug 3286707

Change-Id: Ifa1482bcd82bec0f0c90693e99382b0a86409164
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2530476
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Bhadram Varka
2021-05-17 16:28:28 +05:30
committed by Revanth Kumar Uppala
parent 3e54db3f15
commit ee63b13b24
2 changed files with 51 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

44
drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
View File

@@ -314,6 +314,10 @@ static void ether_disable_eqos_clks(struct ether_priv_data *pdata)
clk_disable_unprepare(pdata->pllrefe_clk);
}
if (!IS_ERR_OR_NULL(pdata->rx_m_clk)) {
clk_disable_unprepare(pdata->rx_m_clk);
}
pdata->clks_enable = false;
}
@@ -529,10 +533,21 @@ static int ether_enable_eqos_clks(struct ether_priv_data *pdata)
}
}
if (!IS_ERR_OR_NULL(pdata->rx_m_clk)) {
ret = clk_prepare_enable(pdata->rx_m_clk);
if (ret < 0) {
goto err_rx_m;
}
}
pdata->clks_enable = true;
return 0;
err_rx_m:
if (!IS_ERR_OR_NULL(pdata->tx_clk)) {
clk_disable_unprepare(pdata->tx_clk);
}
err_tx:
if (!IS_ERR_OR_NULL(pdata->ptp_ref_clk)) {
clk_disable_unprepare(pdata->ptp_ref_clk);
@@ -4456,8 +4471,37 @@ static int ether_get_eqos_clks(struct ether_priv_data *pdata)
goto err_tx;
}
if (osi_core->mac_ver == OSI_EQOS_MAC_5_30) {
pdata->rx_m_clk = devm_clk_get(dev, "eqos_rx_m");
if (IS_ERR(pdata->rx_m_clk)) {
ret = PTR_ERR(pdata->rx_m_clk);
dev_err(dev, "failed to get eqos_rx_m clk\n");
goto err_rx_m;
}
pdata->rx_input_clk = devm_clk_get(dev, "eqos_rx_input");
if (IS_ERR(pdata->rx_input_clk)) {
ret = PTR_ERR(pdata->rx_input_clk);
dev_err(dev, "failed to get eqos_rx_input clk\n");
goto err_rx_input;
}
/* Set default rate to 1G */
clk_set_rate(pdata->rx_input_clk,
ETHER_RX_INPUT_CLK_RATE);
} else {
pdata->rx_m_clk = NULL;
pdata->rx_input_clk = NULL;
}
return 0;
err_rx_input:
if (osi_core->mac_ver == OSI_EQOS_MAC_5_30) {
devm_clk_put(dev, pdata->rx_m_clk);
err_rx_m:
devm_clk_put(dev, pdata->tx_clk);
}
err_tx:
devm_clk_put(dev, pdata->ptp_ref_clk);
err_ptp_ref: