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gpu: host1x: allow tsec streamid reg access via MMIO

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Set Host1X registers to allow both the TSEC StreamID
registers to be programmed via MMIO from the TSEC driver

Bug 3817626

Change-Id: Ic344ecbca557d4c058accc8db1a9f874945e8280
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2801852
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Nikesh Oswal
2022-11-02 12:37:22 +00:00
committed by Laxman Dewangan
parent 25f41bc212
commit f6865a3c2d
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/host1x/dev.c
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@@ -388,6 +388,12 @@ static const struct host1x_sid_entry tegra234_sid_table[] = {
.offset = 0x34, .offset = 0x34,
.limit = 0x34, .limit = 0x34,
}, },
{
/* TSEC MMIO */
.base = 0x16a8,
.offset = 0x30,
.limit = 0x34,
},
}; };
static const struct host1x_info host1x08_info = { static const struct host1x_info host1x08_info = {