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soc: tegra: Reduce number of mem areas

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Reduce number of memory areas for camrtc dbg tests
for DRAM optimization

Bug 3995285

Change-Id: Icc2250915ada202aee962c691d97f14ca861f31d
Signed-off-by: Aniket Bahadarpurkar <aniketb@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2902767
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Pekka Pessi <ppessi@nvidia.com>
Reviewed-by: Semi Malinen <smalinen@nvidia.com>
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
This commit is contained in:
Aniket Bahadarpurkar
2023-05-12 10:16:48 +00:00
committed by mobile promotions
parent 01ecacf7b4
commit fa20ae0dd6
1 changed files with 2 additions and 2 deletions
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4
include/soc/tegra/camrtc-dbg-messages.h
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
#ifndef INCLUDE_CAMRTC_DBG_MESSAGES_H
@@ -183,7 +183,7 @@ struct camrtc_dbg_run_test_data {
};
/* Number of memory areas */
#define CAMRTC_DBG_NUM_MEM_TEST_MEM MK_U32(8)
#define CAMRTC_DBG_NUM_MEM_TEST_MEM MK_U32(4)
#define CAMRTC_DBG_MAX_MEM_TEST_DATA (\
CAMRTC_DBG_MAX_DATA \