Add support for configurable interrupt timers and event notification
queues to SIPL Device Block to mirror the CDAC (QNX) pulse channel
interface.
The CDI_MGR_IOCTL_INTR_CONFIG IOCTL is added to set the timeout
duration at initialization, and existing GPIO interrupt code is
refactored.
Also removes the GPIO index limitation to the range of [0,31] by
returning the complete indices one at a time instead of a bit flag.
Jira CAMERASW-11100
Jira CAMERASW-11385
Jira CAMERASW-9366
Bug 3902416
Bug 3792904
Signed-off-by: Vincent Chung <vincentc@nvidia.com>
Change-Id: I62b6c0bd8be18922ab1fe5d40485a69274f2a18e
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2893327
Reviewed-by: Semi Malinen <smalinen@nvidia.com>
Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>