In Linux v6.11, commit 1a251f52cfdc ("minmax: make generic MIN() and
MAX() macros available everywhere") causes the Tegra ASoC Utils driver
build to fail with the following error:
sound/soc/tegra/tegra_asoc_utils.c:18: error: "MAX" redefined [-Werror]
18 | #define MAX(X, Y) ((X > Y) ? (X) : (Y))
Fix this by add guards around the definition of 'MAX' in the
Tegra ASoC Utils file.
Bug 4749580
Change-Id: I63df434627e6ee7ab16d865c296b07b91405fdfd
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3185143
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Enabling the aud_mclk clock during initialization of drivers
was done for T30 chip due to some external dependencies, now
it is not required for latest version of chips and also due
to this aud_mclk is kept always ON. Add check to avoid enabling
aud_mclk clock other than T30
Bug 4373898
Change-Id: If341b1b73051c5572c5551bf6d4659fab7a116d2
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3015891
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
It is nice to have downstream DTB working well with upstream kernel
drivers. This gives a flexibile option for users to choose between
out-of-tree and upstream audio drivers by selectively adding either
of these to deny list.
For clock PLLA_OUT0, upstream DT uses 'plla_out0' clock name where
as downstream uses 'pll_a_out0'. So aligning with upstream DT makes
probe to fail. Thus update the clock name in driver to match upstream
DT bindings.
The sound DT supports compatibles to either work with upstream or
downstream machine drivers. Earlier the source 'tegra_codecs.c' was
modified to make it potentially usable for upstream machine driver
as well and thus it has upstream compatible checks. This check is
now replaced with a flag which is known to be set only during
upstream machine driver probe.
Bug 4119612
Change-Id: Icd5d97343029e35a5702ff4dc527881fb9277346
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2948525
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Earlier hardcoded pll base rates were leading to fractional divider
values for i2s multichannel config while deriving i2s bclk.
Hence updated clock rates and logic for >2 channel configs for t186ref
and higher boards such that the dynamic range between max plla and min plla
is < 35 MHz. Also, if desired bclk is above limit, the case will be
declared as not supported. Note that new facility will be used only in l4t
machine driver.
Bug 200702569
Change-Id: I83aba425f6dde30a1f29f85b16a1bbbebba14198
Signed-off-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2491744
(cherry picked from commit e0fe51d5e7ced073eb618e19836f88a023f70bdc)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/2613507
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
- Fix the issues with 24KHz and 64KHz sample rate.
- In machine driver, 24KHz and 64KHz were not supported, add
the rates into the list.
- 24KHz is not supported by ALSA, to support it mentioned dai rates
as SNDRV_PCM_RATE_KNOT. Using KNOT chip can support unconventional rates,
defined in hw constraints list.
- The change is added for FE links only, for BE links its not required as
it will be taken care by FE links.
Bug 200757915
Change-Id: I348368420316ba78b303cd27a413048b6cab2dd7
Signed-off-by: sheetal <sheetal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/2571687
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tegra Audio HW subsystem has many I/O module instances and currently a
single PLL source is used for all these modules. Any I2S configuration
is supported now by dynamically updating PLL base rate. But as of today
this has few limitations.
- AUD_MCLK factor is not considered while updating PLL base rate.
- Two module instances can request conflicting PLL base rate and
the last request overrides existing session. This would also mean
simultaneous 8x and 11x configurations are not possible.
- Tegra210 has problems with specific PLL requests.
Multiple PLLs would be required if concurrent audio sessions need to be
supported and dynamic rate update is needed to support any configuration.
But this has few limitions too.
- Since number of available PLLs for modules are limited, specific PLL
cannot be dedicated to a module. The PLL would be shared and may
cause problems when there are simultaneous conflicting requirements.
- Logic for runtime distribution of PLLs to modules and rate updates
has to be managed in module drivers only as machine driver does not
have intelligence to know for which audio path exactly the hw_param()
call comes. This can make the code complicated and buggy where each
module driver tries to control specific PLL.
Instead the problem can be simplified by fixing PLL rates in DT. User
can employ one or more PLLs to realize their design. Of course this won't
support all configurations simultaneously since this is not what users
require generally. They have specific requirements which can be addressed
via DT configurations. For example,
- Some users may use single PLL and decide on compatible set of audio
configurations for their use cases.
- Some users may want to use two PLLs, one each for 8x and 11x. Then
via DT specific modules can use specific PLL sources to realize
simultaneous 8x and 11x configurations. In fact two PLLs can be
used when there are conflicting requirements which cannot be met
by a single PLL source.
To realize above add new DT property "fixed-pll" and bypass PLL rate
updates from the driver. Users can populate this in their platform
sound DT node, whenever static configurations are preferred.
Bug 200726704
Change-Id: I0416f201fd26c49bb6c09594d86394c46a0bbad2
(cherry-picked from commit 0c84a3fe1e2e40d20ddb449a948da6fdebd85efe)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2548361
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Change-Id: I51d5b502f728baee2d6d075951dc186503cbf76f
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/2556536
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Currently AUD_MCLK is controlled by kernel driver and it remains active
as long as an audio use case is running. This is the case most platforms
or audio codecs require. But some external codecs, depending on specific
platform, may want AUD_MCLK clock to be running always and do not require
a runtime control. Since kernel is common, we need a provision in DT to
differentiate both of the above requirements.
This can be achieved by making AUD_MCLK clock an optional property.
Platforms which don't require kernel control can simply exclude AUD_MCLK
clock entry. Respective call in kernel will not have any effect.
Note: We are using upstream utils driver now and update the references
wherever applicable. The changes need not be considered for upstream
because there is plan to use audio-graph-card based driver for Tegra210
and later, which already treats AUD_MCLK clock as optional. Thus no
explicit AUD_MCLK management is necessary. Also it is recommended that
codec driver should take the control of AUD_MCLK. Hence current change
is needed till mentioned transition happens.
Bug 200694208
Change-Id: I87e496515e02db4ded6209a336f6cfbaec034fa1
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2474868
(manually cherry picked from commit 8b2965341c1611b5984ff412f1d5001673396476)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/2518783
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Resolve linux-5.8-rc3 merge conflicts in k5.9 branch
(currently tracking mainline with linux-5.7.0)
Fix build errors in k5.9 branch after merge of linux-5.8-rc3
bug 200617764
Change-Id: I3a358fef6e8b7c5926fd0de05a03cee539547e8f
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Tegra PMC clock clk_out_1 is dedicated for audio mclk from Tegra30
through Tegra210 and currently Tegra clock driver keeps the audio mclk
enabled.
With the move of PMC clocks from clock driver into pmc driver, audio
mclk enable from clock driver is removed and this should be taken care
of by the audio driver.
tegra_asoc_utils_init() calls tegra_asoc_utils_set_rate() and audio mclk
rate configuration is not needed during init and the rate is actually
set during the ->hw_params() callback.
So, this patch removes tegra_asoc_utils_set_rate() call and just leaves
the audio mclk enabled.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra PMC clock clk_out_1 is dedicated for audio mclk from Tegra30
through Tegra210 and currently Tegra clock driver does the initial
parent configuration for audio mclk and keeps it enabled by default.
With the move of PMC clocks from clock driver into PMC driver, audio
clocks parent configuration can be specified through the device tree
using assigned-clock-parents property and audio mclk control should be
taken care of by the audio driver.
This patch has implementation for parent configuration when default
parent configuration through assigned-clock-parents property is not
specified in the device tree.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
tegra_asoc_utils uses clk_get() to get the clock and clk_put() to free
them explicitly.
This patch updates it to use device managed resource API devm_clk_get()
so the clock will be automatically released and freed when the device is
unbound and removes tegra_asoc_utils_fini() as its no longer needed.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch enables Tegra machine driver used on Jetson platform.
Tegra210 and later Jetson platforms use the same machine driver.
Following is the summary from the patch:
* Enable the driver build in defconfig
* Remove "tegra-alt" ASoC utility file
* Renmae "tegra-alt" parser source file "tegra_asoc_dt_parser.c"
to "tegra_asoc_machine.c" and move it to "tegra" directory.
* Similarly "tegra_asoc_machine_alt.h" is renamed to
"tegra_asoc_machine.h" and moved to "tegra".
* Updated "tegra" ASoC utility files for supporting Tegra210 and
later.
* Rename machine driver file.
* The older parsing code is removed.
Bug 2845498
Change-Id: I42d9d2da59febb99ce00a29ce65d7a16f96b1327
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details you should have received a copy of the gnu general
public license along with this program if not write to the free
software foundation inc 51 franklin st fifth floor boston ma 02110
1301 usa
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 246 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000436.674189849@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Tegra124 introduces some small changes to the layout of some registers.
Modify the affected drivers to program those registers appropriately
based on which SoC they're running on.
Tegra124 also introduced some new modules on the AHUB configlink register
bus. These will require new entries in configlink_clocks[] in the AHUB
driver. However, supporting that change likely relies on switching Tegra
to the common reset framework, so I'll defer that change for now.
Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Based-on-work-by: Songhee Baek <sbaek@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Now that all of the Tegra device trees have been updated to represent
the required audio clocks, remove the compatibility code from the Tegra
ASoC utility code, and always use clk_get() rather than clk_get_sys().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tegra114 requires different PLL rates. Modify the code to know about
this.
On Tegra114 only for now, use regular clk_get() rather than clk_get_sys()
to retrieve clocks. This assumes that the clocks will be represented in
device tree. We can assure that from the start of any Tegra114 audio
support. For older chips, I'll add the required clocks properties to the
device trees this kernel cycle, and switch this code to only support the
"new_clocks" path next cycle.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tegra only supports, and always enables, device tree. Remove all runtime
checks for DT support from the driver.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Recent list discussions concluded that drivers should not be calling
of_have_populated_dt(), and hence of_have_populated_dt() should not be
exported. Use a different mechanism to detect DT vs. non-DT boot.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tegra30 has some additional clocks that need to be manipulated, names
some clocks differently, runs PLLs at different base rates, etc. The
utility code needs to handle this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Initialize the audio clock tree appropriately for some reasonable rate.
This makes sure the PLLs etc. are actually programmed to something
reasonable when the audio driver is loaded.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Lots of sound drivers were getting module.h via the implicit presence
of it in <linux/device.h> but we are going to clean that up. So
fix up those users now.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Only the clock programming code needs to know whether the clocks changed,
and that is encapsulated within tegra_asoc_utils_set_rate(). The machine
driver's call to snd_soc_dai_set_sysclk(codec_dai, ...) is safe
irrespective of whether the clocks changed.
(Applying Mark's TrimSlice review comments to the existing driver)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The utilities will be required by every machine driver. Including the
utility object directly into every machine driver causes a build failure
if the modules are actually built into the kernel, since each will define
the symbols exported by the utility file. Solve this by moving the
utility object into a separate module.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Instead, have the machine driver provide storage for the utility data
somehow.
For Harmony in particular, store this within struct tegra_harmony, itself
referenced by snd_soc_card's drvdata.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
A recent discussion on linux-arm-kernel noted that the value returned by
clk_get_sys is an opaque token, and not strictly a pointer; it is
meaningful only to the clock API, clients should not dereference the value,
and the clock API must accept any non-IS_ERR value it returned.
Hence, only IS_ERR is appropriate to interpret the result, not
IS_ERR_OR_NULL.
I checked that clk_get_sys in both ASoC's for-next and Tegra's for-next
do behave as described; NULL is not returned in the case of error.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Many portions of Tegra ASoC machine drivers will be similar or identical.
To avoid cut/paste, this file will act as a repository for all that common
code. For now, it solely includes code to reprogram the audio PLL for
44.1KHz- vs. 48KHz-based sample rates.
Signed-Off-By: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
