- Adds DLA2 firmware version interface for version
verification
- Include DLA driver's t23x build path
- For firmware verification with multi-chip support,
- Use nvhost_device_data's "version" param which distinguishes
chip specific data at compile time
- So encode fw version into "version" param.
- Inline function can't be used at compile so use available macro
Jira DLA-3182
Change-Id: Id9185c98ae924faea7a16d5f88d30c9b183c94f2
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2359968
Reviewed-by: Praveen K <kpraveen@nvidia.com>
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Currently,
- On device node close, nvhost ACM updates clock rate
to default rate.
- DLA default rate is set to UINT_MAX.
- These causes max rate requests from DLA on device node close.
Fix,
- Set default rate for DLA as zero. On device node close, aggregrate
requests capped.
- On device node open, keep EMC requests to max.
so DLA inference doesn't impact for perf.
Bug 2769574
Change-Id: Icdaa8943ee143a5fa8c7310db9b7fac636c5be50
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: nmalwade <nmalwade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2255718
GVS: Gerrit_Virtual_Submit
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[1] Adds sof_task_status field which is written before
start of task execution. (i.e before SOF signals)
[2] eof_task_status feature already exists in form of
output_task_status (field renamed for clarity)
Jira DLA-1992
Jira DLA-1993
Change-Id: Icc26a7a40f18bb2af1caaff054641c45b9772945
Signed-off-by: Arvind M <am@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2121531
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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[1] Adds support for prefence signal support
[2] Facilitates handling of SOF feature request from higher
levels
[3] Update ioctl structure for emu_submit to allow prefence
with signal action
Jira DLA-1992
Jira DLA-1993
Change-Id: Id0fe8a7a3ff46227121ec5342197b1da2a3f346d
Signed-off-by: Arvind M <am@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2121530
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
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[1] Action op code macros has been renamed for better
representation
[2] It has been categorized based on control (ACTION_TERMINATE),
read (ACTION_*_[GE|EQ]) and write actions (ACTION_WRITE_*)
[3] Extract different functions from nvdla_fill_preactions and
nvdla_fill_postactions
- nvdla_fill_wait_fence_action
- nvdla_fill_signal_fence_action
- nvdla_fill_taskstatus_read_action
- nvdla_fill_taskstatus_write_action
This is useful if some functions are used by both fill_preactions
and fill_postactions
Jira DLA-2027
Change-Id: Iddac852cee7d491be18982c97f930401dd41f855
Signed-off-by: Arvind M <am@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2121529
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Since all of MAX_NUM_NVDLA_PREFENCES, MAX_NUM_NVDLA_POSTFENCES,
MAX_NUM_NVDLA_IN_TASK_STATUS and MAX_NUM_NVDLA_OUT_TASK_STATUS are 32,
it is possible to use narrower 'u8' type for appropriate counters.
This is similar to what we have in PVA and also fixes some annoying
warnings issued by automatic validators.
Signed-off-by: Dmitry Antipov <dantipov@nvidia.com>
Change-Id: Ia99ecb7daed7b60336254b18acaab31fab157ad4
Reviewed-on: https://git-master.nvidia.com/r/1980368
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
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For NSys, we're interested in having detailed information on what task
waits on a particular prefence or requests a particular postfence.
This is implemented by adding two extra fields, 'task_syncpt_id' and
'task_syncpt_thresh' to 'struct nvhost_task_fence', to record the task
this particular fence is associated with.
To avoid race conditon in pva_submit (similar to what was fixed in
0c2065fd669926536f79fd9e8ec33f33cbdcae2e), PVA task memory management
is changed to use simple kref-based scheme, much like it's done in DLA.
Finally, this patch renames syncpoint fields of 'task_fence' to 'syncpt_id'
and 'syncpt_thresh' to match the same field names in other events, which
is intended to simplify Python scripting.
JIRA DTSP-1662
JIRA DTSP-682
Signed-off-by: Dmitry Antipov <dantipov@nvidia.com>
Change-Id: I4c55efcae15eb80a0d950882d6ff6e5ac706ab20
Reviewed-on: https://git-master.nvidia.com/r/1978175
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
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This reverts commit c49670d23c368245670556b54ff83cc6b4edb96b.
The original commit was reverted because it exposed DLA UMD driver to
include kernel headers directly.
Since then, DLA UMD driver has been fixed to use headers from
user-space code. And hence restore this commit.
Bug 200471393
Change-Id: I221f56c5d12bd3db79568398a95baa61ffcd8101
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1980599
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This is causing Android builds to fail
This reverts commit 965ceca35c92eba011163f4c637b3b9e0f073f1a.
Change-Id: I84a98d129d25e33d1828033ab48a60102252b516
Signed-off-by: Sharif Inamdar <isharif@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1959908
- Xavier has different SKUs based on which different engines are enabled
or disabled based on fuse setttings.
- This patch probes engines only if they are actually enabled in SKU by
reading SKU INFO.
- This makes sure that we dont access engines if they are enabled
inadvertently in DT
Bug 200428527
JIRA VFND-5075
Change-Id: I4d3a4c84452237fdab0426980282cd9c39cc2a28
Signed-off-by: Deepak Bhosale <dbhosale@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1784306
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Damian Halas <dhalas@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
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- Update TODO's
A. FW_VERSION was added for backward compatibility for legacy firmware.
As firmware ver <0.6.0 is expected not to be used in future, so remove
checks, macro and TODO comment it.
B. MAX_GRID_SIZE is not expected to managed through nvhost as that
indirectly managed in nvmap, so remove TODO comment.
C. Adding runtime checks in timeout for abort handler would add
few cycles.
- Send gos region if it fails in second attempt
A. GoS region fetch may fail for first poweron during device boot
GoS region may not be invoked/fail in second attempt
Explicitly attempt again if it failed in previous attempts
B. Mark invalid error for max num grids
C. Add more comments for future changes for GoS handling
Jira DLA-798
Change-Id: Idfd6ed2f76cbc1f6dc7ad465edbf1db0e49181c4
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1756614
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
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- GoS table available only after all devices
registeres with host.
- GoS table required to send to falcon with
every poweron.
- Currently, GoS id fetched during task submit
data fill and before actual task submit.
- Engine is powered on just before task submit
- considering all these, it is necessary to fetch
GoS table before first task submit fill.
- so poweron engine to fetch table first
Jira DLA-673
Change-Id: Ibf31df8ed1a8b46792dde0ffb438f416335f5e09
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1683293
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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