Issue:
1) dev_queue_xmit acquired the per queue tx lock and called driver
transmit routine.
2) During the transmit - common interrupt asserted which tries to
acquire the same tx lock which resulted in lock recursion.
Fix: Move the lock acquire to tasklet context under common isr.
Bug 3773016
Change-Id: I7cfd49beb1238286d3bccd9e4b9ccc054c4f6d30
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2770227
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Issue: In the current scenrio, when the remote
interface is brought down and up. There is no way
of getting the link up again with the remote device
which in turn fails the data transfers even though
interface from other end is brought up.
Fix: When interface is gone down on the other side,
MAC receives local faults and in this scenario
no data should be sent to MAC, so disable network
queues and initiate the lane bring up process for
monitoring the link status. Once the link is up,
re enable the network queues for data transfers.
Also added support for enabling driver logs using
msglvl of ethtool
Bug 3744088
Bug 3654543
Bug 3665378
Change-Id: I16cdee74e4e3ff6cd176924575f5005f385d4c5d
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2730876
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Issue: Observed Tx timestamp timeout from application since
workqueue is not getting scheduled at the driver layer to consume
the Tx timestamp from the OSI layer which resulted in tx_timeout
from APP layer.
Fix: Invoke the timestamp consume function in tx done instead
of scheduling through workqueue. Schedule the work queue only
if the timestamp is not found.
Bug 3658701
Change-Id: If97aebc1980f685e3cc34f135ace91298ee78657
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2732444
Reviewed-by: Troy Kong <troyk@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Troy Kong <troyk@nvidia.com>
GVS: Gerrit_Virtual_Submit
Issue:
OSD Driver maintains a local MC address list to avoid the programming
old addresses again into HW when new MC address list passed from the
network stack.
Its observed MC address index for a specific address is different once a
MC address deleted from the list. Because of this new MC address which
is passed in new list is overwriting the old MC address.
Fix:
Program the entire list every time when network stack passes it instead
of maintaining local list at driver.
Bug 3609583
Change-Id: I97cb3ea4d35641ad156d16c54c89e8593ad64459
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2702851
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
GVS: Gerrit_Virtual_Submit
1) Add threaded interrupt handler function to call EPL API
to report error.
2) add hsi_enable sysfs interface to enable HSI feature at runtime
to enable:
echo enable > /sys/devices/platform/./nvethernet/hsi_enable
to disable:
echo disable > /sys/devices/platform/./nvethernet/hsi_enable
3) For mac RX CRC and checksum error, error reporting frequency is
every one second for HSI_ERROR_THRESHOLD error count
4) Added DT property “nvidia,hsi_err_time_threshold” to specify time
threshold for error reporting
5) Added DT property "nvidia,hsi_err_count_threshold" to specify
error count threshold for error reporting
Bug 3543410
Change-Id: I73ef1a674a846295e02deff7e07954e8dada9792
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2675040
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit
Issue: Adjust link from the phy subsystem can be called
multiple times either with link down or up. If its called
second time with same link down then code tries to disable
the same clks again which results in clock warinigs.
Fix: Maintain the state of the clk and then disable/enable
the clock based on the state.
Bug 3585098
Change-Id: I7d259e6066c7b67d0a970122eb0841e4b5871b43
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2688290
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Issue:
- Workqueue for Tx timestamp is running without
delay, use many CPU cycle at hard isr thread
priority.
- Incorrect return value from ether_handle_tso()
Fix:
- Update code to use delayed workqueue
- Return correct value
Bug 200780891
Bug 3400623
Change-Id: I2095a0634e079bf870ef87cd2de1d35fe24bafd4
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2610986
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Algorithm:
- There is one master queue and one final queue to maintain the
packets.
- Final queue will start when a packet received with TTL=1
- TTL = 2 and 3 packets will be queued into final if those are in
sequence else those will be queued to master queue.
- When packet received with TTL = 2 then only merge process will start
- For every valid final queue merge starts by looking at the IPID
in master queue in increment order. This loop continues until
TTL = 2 found in master queue.
- Once TTL = 2 found then entire final queue will be given GRO
layer in sequential order.
Bug 3106903
Change-Id: I6cc08f3faae67a04813d32d59f7cce02f06dccbf
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2554423
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
BPMP-FW exposes the following MGBE RX clocks:
o mgbe0_rx_input [external input clk recovered from GBE UPHY lane]
o mgbe0_rx_input_m [monitoring clk: virtual clk controls RX clk FMON]
o mgbe0_rx_pcs_input [external input clk recovered from GBE UPHY lane]
o mgbe0_rx_pcs [mux between mgbe0_rx_pcs_input and mgbe0_tx_pcs]
o mgbe0_rx_pcs_m [monitoring clk: virtual clk controls RX PCS clk FMON]
To enable RX clock FMON -
o Issue clk_set_rate on MGBE_RX_INPUT and MGBE_RX_PCS_INPUT based
on UPHY GBE mode.
o Clk_enable already available on ToT for RX_INPUT_M
and RX_PCS_INPUT_M.
Bug 3288030
Change-Id: Ia71ccc9f21a5e79fecf149efae9032db25af60d8
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2544758
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
- On transmit complete callback
-- If OSI_TXDONE_CX_TS_DELAY flag is set in Tx done
flag, store buffer pointer along with pkt Id
in its internal array/list
- On Common interrupt:
-- Call osi to handle common interrupt.
- On trasmit complete interrupt:
-- Parse through internal array/list for pending TS
to read, by issuing OSI_CMD_GET_TS ioctl for pkt_id.
Loop until list is cleared or error is received.
-- On interface up
Remove old timestamp of channels initialized.
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Change-Id: I5104277de66dd240023f921fa5f7b4fcc035f74d
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2535962
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
There are three clks for MGBE which needs to be set based
on UPHY GBE mode and PHY line rate.
o MGBE_MAC_DIV_CLK will be set based on PHY line rate
o MGBE_MAC_TX/TX_PCS clks will be set based on UPHY GBE mode
Below are the settings -
UPHY GBE mode = 10G:
===================
Possible MAC working rates: 10G/5G/2.5G
1) MAC DIVISOR: 312.5MHz, 312.5/2MHZ and 312.5/4MHz
2) TX CLK: 644.5MHZ
3) TX PCS_CLK: 156.5MHz
UPHY GBE mode = 5G:
==================
Possible MAC working rates: 5G/2.5G
1) MAC DIVISOR: 312.5/2MHz and 312.5/4MHz
2) TX CLK: 322.2MHZ
3) TX PCS_CLK: 78.125MHz
Bug 200739493
Change-Id: Ie6b21f87d2077b8be621a32b2034b4eff1eb391e
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2541313
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Linux OSD code maintaining link list to identify L2
filter added/removed in compare to earlier list.
By doing this OSD sends address and dma channel which
should to be removed from hardware instead of full
list every time.
Bug 200711542
Bug 200711544
Bug 200713215
Change-Id: I95d4dc687c5fd45a6e0bbc3c097e59b90b03b0e5
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2519592
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Issue:
1) Missing support for packet MC/BC packet duplication
2) Remove MAC UC and BC address on ether_close()
Fix:
1) Update OSI_CMD_L2_FILTER structure parameter to support
new algorithm.
2) MAC UC and BC address added to filter from ether_open()
and ether_resume() function.
3) Configure MAC register to support MC/BC packet
duplication
Bug 200711542
Bug 200711544
Bug 200713215
Change-Id: Ie589892de121e5873f5dfa9b9db9bf5c441ece71
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2519591
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
This commit adds the driver interface for the
MACsec controller. The driver interface is
invoked using generic netlink messages from
userspace MACsec key agreement agent.
Currently sysfs node is added to check the irq
stats for default macsec controller operation.
Bug 2913560
Change-Id: I07b0b778ba1c6674e87b103a3e68e158fea61c2c
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
- Add a new DT node to enable Multiple DMA routing
for netdev MC MAC ddress. Read the DT value
and store it into OSI core private data.
- Add new driver private IOCTL for MC DMA channels
selection as inputs and call ether_set_rx_mode
to update MAC filters with given DMA channels route.
Bug 200565911
Change-Id: I1e65322489e34c4b6318a769dac963073d4887ad
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
