Commit Graph

4 Commits

Author SHA1 Message Date
Ashish Mhetre
01b31bbabb memory: tegra: Update allowlist of PERFMUX registers
Add few PERFMUX register offsets to allowlist for SOC-HWPM to access.

Bug 4704678

Change-Id: Ica7c6d2a7fc47699abf0969eef1b4b4a518a5b78
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3221623
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ashish Mhetre
6d78ed22c7 memory: tegra: Restrict access to non-PERMUX registers
SOC-HWPM shouldn't request read/write to non-PERMUX registers of
MC-Channels or MSS-HUB. If it does, restrict the access and return
error.

Bug 4704678

Change-Id: I03bae82dfcf4bb9b63e135132b03b5b1e67632f1
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3198241
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Ketan Patil <ketanp@nvidia.com>
2025-07-24 10:19:08 +00:00
Ashish Mhetre
b2999bef41 memory: tegra: Update number of MC channels
MC has 16 channels and one broadcast channel on T264.
Update same in mc-hwpm driver for T264.

Bug 3846055

Change-Id: I625198b346069501eb9384cf41e6031627a89709
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2944957
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Ketan Patil <ketanp@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ashish Mhetre
e6106d4ecb memory: tegra: Add mc-hwpm driver for T264
Add mc-hwpm driver for T264. This driver registers hwpm_ip_ops
which is used by hwpm driver to evaluate performance of MC channels.

Bug 4110130

Change-Id: I72af8dc60e834195129292d2d5263a6db1cf6f1a
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2914644
Reviewed-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00