UFS parent clock in T264 is pllrefufs_clkout624
and the rate is to 208 MHz.
Bug 4199271
Change-Id: I5b86e199f93fc1c81506cb29391b96efdc7de3a4
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Set HCLKDIV to 0xD0 as per IAS.
Bug 4199271
Change-Id: I4779c74c657d8723a27a167096dfac9d22128436
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Use conftest for finding whether APIs tegra264_io_pad_power_*
are available or not before using it.
Bug 4911768
Change-Id: Ic8df4a0109a270d5a486a67900ed7fe4c57b79be
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
The change to write the INTF_CRC_CFG register was inadvertently
left out. Correct this.
Bug 4809300
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I208da56d03e90e72ce26dffe7bef1cdeab95fab6
Update the misc register programming for T264
for slave.
Bug 4711327
Change-Id: Ia6409bbee66e9984f83ad792d67c730fa637f58d
Signed-off-by: Vishwaroop A <va@nvidia.com>
Add support to profile NvHost IPs on various chips
by HWPM module.
Bug 4170421
DOS-SHR-7966
Signed-off-by: vasukis <vasukis@nvidia.com>
Change-Id: I42ac3b5fa79d7b6f97e66098cb84277cda2aff4d
T264 has 1MHz clock for tach. Add support for this
clock.
Signed-off-by: Vishwaroop A <va@nvidia.com>
Change-Id: Ic2ecc5dd2494f3b55340f1b925ca616c4844ed6f
Tegra264 use a different base address than Tegra234.
Update the logic of parsing Base Timer and WDT index from iomem resource
beginning.
Bug 4729969
Change-Id: I68d4f03373d2d648c1cf3b82bf74972361693bb5
Signed-off-by: Kartik <kkartik@nvidia.com>
Add support for T264 which has four I2C/DP-AUX instances and four
separate registers to configure each of it. The four registers are
in consecutive addresses, but follow the same bitmap as T234.
T264 I2C <-> DPAUX map is as below:
I2C6 <-> DPAUX0
I2C10 <-> DPAUX1
I2C4 <-> DPAUX2
I2C8 <-> DPAUX3
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I0a38a9a96894fc2d9bb1c0647f4f9cf06e13aaf1
Adding support in existing mttcan driver to control T264 FSI
CAN controllers from CCPLEX whether FSI firmware is loaded on
system or not. FSI CAN clocks will be enabled by FSI crystal clock
upon boot. SW does not need to enable or control clocks. CCPLEX cannot
control FSI controller resets, reset can be handled during boot, thus
disabled clocks and reset for T264 SOC.
Bug 4317516
Change-Id: I8e6b20640c8763ebc0a9d9192e3212a49902f9b4
Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
For Tegra264, new PMC driver is introduced to support instance specific
driver data. As per the design, on Tegra264, if client drivers are using
below PMC exported APIs, they need to pass their struct device pointer
as an argument. Also it is expected that clients dt node should have
"nvidia,pmc" property populated with appropriate PMC instance phandle.
- *_io_pad_power_enable()
- *_io_pad_power_disable()
Bug 4470933
Change-Id: Idb41b95cd863f313496110a4e3c4b5ea61a1df8f
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
- Add compatible and chip data for T264 ADSP[1:0] and AON
- Add T264 dev files to build makefile
DNS
Bug 3682950
Bug 4165898
Change-Id: Idbaef1950ff2f736c7844ee0525d55b596b11132
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Same compatible string can be shared between host1x_next and
host1x_fence kernel modules so that those two modules will get
automatically loaded.
Bug 4291144
Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Change-Id: I9901f4e094d1d6484f6d6cec6b9890c9a51ad1f6
host1x-fence driver is updated to support t264.
Bug 4132685
Change-Id: I239d12864d6336cc6acca2265dbec3cd05ee629b
Signed-off-by: jianjunm <jianjunm@nvidia.com>
Added t264 specific pdata struct to
use r5_ctrl and pwr_status registers
values.
Jira CAMERASW-11038
Change-Id: I4ae6b3ffee48eff61a6b7a7309c251c38d68bf30
Signed-off-by: fraunak <fraunak@nvidia.com>
Adding a module that disables cg on t264 specifically. This is meant for
purely internal usage by the SSG and noise-characterization teams.
We are making use of some override signals that remain on a per-core
basis for this purpose.
Bug 4697511
Change-Id: I04093b97b10e1a87bfaa2615573b284a6f1ef4f3
Signed-off-by: Ishan Shah <ishah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3237175
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
In Linux v6.11, the 'platform_driver' structure 'remove' callback was
updated to return void instead of 'int'. Update the MODS drivers as
necessary to fix this. Note that we can simply remove the mods_dmabuf
'remove' function because it does nothing.
Bug 4749580
Change-Id: I8ac05a7b713916b9aca1694ca828682808df3287
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3235514
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Chris Dragan <kdragan@nvidia.com>
Reviewed-by: Carl Dong <carld@nvidia.com>
In Linux v6.11, the 'platform_driver' structure 'remove' callback was
updated to return void instead of 'int'. Update the Tegra264 memory
drivers as necessary to ensure that they can be built for Linux v6.11+
kernels.
The mem-qual driver is missing the vmalloc.h header file and this also
causes the build to fail for Linux v6.10+ kernels to fail.
Finally, remove the version.h file from the mem-qual driver as this is
not needed.
Bug 4749580
Change-Id: I2f6273dff68fddf0d4eff4c2f4d57c445b3de291
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3235930
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Allocate the buffer based on the request instead of a fixed buffer
length. In operations which may require larger buffer size, a fixed
buffer may fail. Similar patch was added for AES algorithms. Fix the
same for HASH algorithms as well.
Bug 4908156
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: Idd2c1ceae1a85434a5a51154a17dce8c927bb66c
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3233718
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
The 'core_init_notifier' has been removed from the pci_epc_features
structure in Linux v6.10. Given that this is a static structure and it
is initialised as 'false', we don't need to explicitly initialise this
because it will always be initialised as 'false' by default for kernels
that support this.
Bug 4787193
Bug 4593750
Change-Id: Ic2abaa3d2ab1a5c766a805936fd8ab394214bf42
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3233999
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Add support to query handle parameters For a foreign fd pointing to a
buffer created by OpenRM. Protect the code inside a config. Minimal info
is provided like buffer size and alignment. Other info is not required
as per the discussion with VIC and NvMM team.
Bug 4699600
Change-Id: I286a7f13d5ce33290b72748c9a745164fdff78ea
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3181574
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
