mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-24 18:21:35 +03:00
Compare commits
5 Commits
jetson_38.
...
jetson_36.
| Author | SHA1 | Date | |
|---|---|---|---|
|
4212fbd97f | ||
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4e63d195c6 | ||
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4ad0e0c6c8 | ||
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969619a872 | ||
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ad7508c52a |
25
.gitignore
vendored
25
.gitignore
vendored
@@ -1,25 +0,0 @@
|
||||
# SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
#
|
||||
# Use command 'git ls-files -i --exclude-standard' to ensure that no
|
||||
# tracked files are ignored.
|
||||
#
|
||||
*.o
|
||||
*.o.*
|
||||
*.a
|
||||
*.s
|
||||
*.ko
|
||||
*.so
|
||||
*.so.dbg
|
||||
*.mod.c
|
||||
*.i
|
||||
*.symtypes
|
||||
*.order
|
||||
*.patch
|
||||
modules.builtin
|
||||
Module.symvers
|
||||
*.dwo
|
||||
*.mod
|
||||
*.cmd
|
||||
*mods.dtb*
|
||||
|
||||
@@ -1,125 +0,0 @@
|
||||
#SPDX-License-Identifier: GPL-2.0-only
|
||||
#Copyright (c) 2024, NVIDIA Corporation. All rights reserved.
|
||||
|
||||
version = "1.0.0"
|
||||
|
||||
#Filter out all packages for NSPECT-2SC5-5SJZ program ONLY
|
||||
[[oss.excluded.directories]]
|
||||
paths = ['drivers/block/',
|
||||
'drivers/bus/',
|
||||
'drivers/clk/',
|
||||
'drivers/devfreq/',
|
||||
'drivers/gpu/',
|
||||
'drivers/mfd/',
|
||||
'drivers/net/',
|
||||
'drivers/nvpps/',
|
||||
'drivers/pinctrl/',
|
||||
'drivers/pwm/',
|
||||
'drivers/reset/',
|
||||
'drivers/soc/',
|
||||
'drivers/tty/',
|
||||
'drivers/virt/',
|
||||
'drivers/bluetooth/',
|
||||
'drivers/c2c/',
|
||||
'drivers/cpuidle/',
|
||||
'drivers/firmware/',
|
||||
'drivers/hwmon/',
|
||||
'drivers/media/',
|
||||
'drivers/misc/',
|
||||
'drivers/nv-p2p/',
|
||||
'drivers/nv-virtio/',
|
||||
'drivers/platform/',
|
||||
'drivers/ras/',
|
||||
'drivers/rtc/',
|
||||
'drivers/spi/',
|
||||
'drivers/usb/',
|
||||
'drivers/watchdog/',
|
||||
'drivers/bmi088/',
|
||||
'drivers/clink/',
|
||||
'drivers/crypto/',
|
||||
'drivers/gpio/',
|
||||
'drivers/i2c/',
|
||||
'drivers/memory/',
|
||||
'drivers/mtd/',
|
||||
'drivers/nvpmodel/',
|
||||
'drivers/pci/',
|
||||
'drivers/power/',
|
||||
'drivers/regulator/',
|
||||
'drivers/scsi/',
|
||||
'drivers/thermal/',
|
||||
'drivers/video/tegra/camera/',
|
||||
'drivers/video/tegra/dc/',
|
||||
'drivers/video/tegra/host/capture/',
|
||||
'drivers/video/tegra/host/isp/',
|
||||
'drivers/video/tegra/host/nvcsi/',
|
||||
'drivers/video/tegra/host/nvdla/',
|
||||
'drivers/video/tegra/host/vi/',
|
||||
'drivers/video/tegra/nvmap/',
|
||||
'drivers/video/tegra/tsec/',
|
||||
'drivers/video/tegra/virt/',
|
||||
'Documentation/',
|
||||
'include/',
|
||||
'configs/',
|
||||
'scripts/',
|
||||
'sound/',
|
||||
'tools/']
|
||||
comment = 'Not used by PVA or not used by PVA in Production'
|
||||
nspect_ids = ['NSPECT-2SC5-5SJZ']
|
||||
|
||||
#Filter out all packages for NSPECT-86XH-KQRC program ONLY
|
||||
[[oss.excluded.directories]]
|
||||
paths = ['drivers/block/',
|
||||
'drivers/bus/',
|
||||
'drivers/clk/',
|
||||
'drivers/devfreq/',
|
||||
'drivers/gpu/',
|
||||
'drivers/mfd/',
|
||||
'drivers/net/',
|
||||
'drivers/nvpps/',
|
||||
'drivers/pinctrl/',
|
||||
'drivers/pwm/',
|
||||
'drivers/reset/',
|
||||
'drivers/soc/',
|
||||
'drivers/tty/',
|
||||
'drivers/virt/',
|
||||
'drivers/bluetooth/',
|
||||
'drivers/c2c/',
|
||||
'drivers/cpuidle/',
|
||||
'drivers/firmware/',
|
||||
'drivers/hwmon/',
|
||||
'drivers/media/',
|
||||
'drivers/misc/',
|
||||
'drivers/nv-p2p/',
|
||||
'drivers/nv-virtio/',
|
||||
'drivers/platform/',
|
||||
'drivers/ras/',
|
||||
'drivers/rtc/',
|
||||
'drivers/spi/',
|
||||
'drivers/usb/',
|
||||
'drivers/watchdog/',
|
||||
'drivers/bmi088/',
|
||||
'drivers/clink/',
|
||||
'drivers/crypto/',
|
||||
'drivers/gpio/',
|
||||
'drivers/i2c/',
|
||||
'drivers/memory/',
|
||||
'drivers/mtd/',
|
||||
'drivers/nvpmodel/',
|
||||
'drivers/pci/',
|
||||
'drivers/power/',
|
||||
'drivers/regulator/',
|
||||
'drivers/scsi/',
|
||||
'drivers/thermal/',
|
||||
'drivers/video/tegra/camera/',
|
||||
'drivers/video/tegra/host/',
|
||||
'drivers/video/tegra/nvmap/',
|
||||
'drivers/video/tegra/tsec/',
|
||||
'drivers/video/tegra/virt/',
|
||||
'Documentation/',
|
||||
'include/',
|
||||
'configs/',
|
||||
'scripts/',
|
||||
'sound/',
|
||||
'tools/']
|
||||
comment = 'Unused packages in Display Serdes'
|
||||
nspect_ids = ['NSPECT-86XH-KQRC']
|
||||
196
BUILD.bazel
196
BUILD.bazel
@@ -1,196 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
# SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
|
||||
load("//build/kernel/kleaf:kernel.bzl", "kernel_module")
|
||||
|
||||
package(
|
||||
default_visibility = [
|
||||
"//visibility:public",
|
||||
],
|
||||
)
|
||||
|
||||
filegroup(
|
||||
name = "oot.includes",
|
||||
srcs = glob([
|
||||
"include/**/*.h",
|
||||
]),
|
||||
)
|
||||
|
||||
filegroup(
|
||||
name = "host1x.includes",
|
||||
srcs = glob([
|
||||
"drivers/gpu/host1x/include/**/*.h",
|
||||
"drivers/gpu/host1x-fence/include/**/*.h",
|
||||
]),
|
||||
)
|
||||
|
||||
filegroup(
|
||||
name = "nvmap.includes",
|
||||
srcs = glob([
|
||||
"drivers/video/tegra/nvmap/include/**/*.h",
|
||||
]),
|
||||
)
|
||||
|
||||
filegroup(
|
||||
name = "pci.includes",
|
||||
srcs = glob([
|
||||
"drivers/pci/endpoint/functions/*.h",
|
||||
]),
|
||||
)
|
||||
|
||||
kernel_module(
|
||||
name = "nvoot",
|
||||
srcs = glob(
|
||||
["**"],
|
||||
exclude = [
|
||||
".*",
|
||||
".*/**",
|
||||
"*.bazel",
|
||||
"**/*.bzl",
|
||||
],
|
||||
) + [
|
||||
"//hwpm:hwpm_headers",
|
||||
"//nvidia-oot/scripts/conftest:conftest_headers",
|
||||
],
|
||||
outs = [
|
||||
# keep sorted
|
||||
"drivers/block/tegra_oops_virt_storage/tegra_hv_vblk_oops.ko",
|
||||
"drivers/block/tegra_virt_storage/tegra_vblk.ko",
|
||||
"drivers/bluetooth/realtek/rtk_btusb.ko",
|
||||
"drivers/bus/tegra-aocluster.ko",
|
||||
"drivers/cpuidle/cpuidle-debugfs.ko",
|
||||
"drivers/cpuidle/cpuidle-tegra-auto.ko",
|
||||
"drivers/crypto/tegra-hv-vse-safety.ko",
|
||||
"drivers/crypto/tegra-nvvse-cryptodev.ko",
|
||||
"drivers/crypto/tegra-se-nvrng.ko",
|
||||
"drivers/crypto/tegra/tegra-se-kds.ko",
|
||||
"drivers/crypto/tegra/tegra-se.ko",
|
||||
"drivers/devfreq/governor_pod_scaling.ko",
|
||||
"drivers/devfreq/tegra_wmark.ko",
|
||||
"drivers/firmware/tegra/ivc_ext.ko",
|
||||
"drivers/firmware/tegra/tegra_bpmp.ko",
|
||||
"drivers/gpio/gpio-max77851.ko",
|
||||
"drivers/gpu/drm/tegra/tegra-drm.ko",
|
||||
"drivers/gpu/host1x-emu/host1x-emu.ko",
|
||||
"drivers/gpu/host1x-fence/host1x-fence.ko",
|
||||
"drivers/gpu/host1x/host1x.ko",
|
||||
"drivers/gpu/host1x-nvhost/host1x-nvhost.ko",
|
||||
"drivers/hwmon/f75308.ko",
|
||||
"drivers/hwmon/ina232.ko",
|
||||
"drivers/i2c/busses/i2c-nvvrs11.ko",
|
||||
"drivers/i2c/busses/i2c-tegra-slave-byte.ko",
|
||||
"drivers/media/i2c/max9295.ko",
|
||||
"drivers/media/i2c/max9296.ko",
|
||||
"drivers/media/platform/tegra/cam_fsync/cam_fsync.ko",
|
||||
"drivers/media/platform/tegra/cdi/cdi_dev.ko",
|
||||
"drivers/media/platform/tegra/cdi/cdi_gpio.ko",
|
||||
"drivers/media/platform/tegra/cdi/cdi_mgr.ko",
|
||||
"drivers/media/platform/tegra/cdi/cdi_pwm.ko",
|
||||
"drivers/media/platform/tegra/isc/isc_dev.ko",
|
||||
"drivers/media/platform/tegra/isc/isc_gpio.ko",
|
||||
"drivers/media/platform/tegra/isc/isc_mgr.ko",
|
||||
"drivers/media/platform/tegra/isc/isc_pwm.ko",
|
||||
"drivers/media/platform/tegra/v4l2loopback/v4l2loopback.ko",
|
||||
"drivers/memory/tegra/mc-t26x.ko",
|
||||
"drivers/memory/tegra/mem-qual.ko",
|
||||
"drivers/memory/tegra/smmu-hwpm.ko",
|
||||
"drivers/memory/tegra/tegra264-mc-hwpm.ko",
|
||||
"drivers/mfd/max77851.ko",
|
||||
"drivers/mfd/nvidia-vrs-pseq.ko",
|
||||
"drivers/misc/bluedroid_pm.ko",
|
||||
"drivers/misc/ioctl_example.ko",
|
||||
"drivers/misc/nvscic2c-pcie/nvscic2c-pcie-epc.ko",
|
||||
"drivers/misc/nvscic2c-pcie/nvscic2c-pcie-epf.ko",
|
||||
"drivers/misc/nvsciipc/nvsciipc.ko",
|
||||
"drivers/misc/tegra-cec/tegra_cec.ko",
|
||||
"drivers/misc/tegra-pcie-dma-test.ko",
|
||||
"drivers/mtd/devices/tegra_hv_mtd.ko",
|
||||
"drivers/net/can/mttcan/mttcan.ko",
|
||||
"drivers/net/ethernet/marvell/oak/oak_pci.ko",
|
||||
"drivers/net/ethernet/microchip/lan743x.ko",
|
||||
"drivers/net/ethernet/nvidia/nvethernet/nvethernet.ko",
|
||||
"drivers/net/ethernet/nvidia/pcie/tegra_vnet.ko",
|
||||
"drivers/net/ethernet/realtek/r8125/r8125.ko",
|
||||
"drivers/net/ethernet/realtek/r8126/r8126.ko",
|
||||
"drivers/net/ethernet/realtek/r8168/r8168.ko",
|
||||
"drivers/nv-p2p/nvidia-p2p.ko",
|
||||
"drivers/nvpmodel/nvpmodel-clk-cap.ko",
|
||||
"drivers/nvpps/nvpps.ko",
|
||||
"drivers/nvtzvault/nvtzvault.ko",
|
||||
"drivers/nv-virtio/nv-virtio-console-poc.ko",
|
||||
"drivers/pci/controller/pcie-tegra-vf.ko",
|
||||
"drivers/pci/controller/pcie-tegra264.ko",
|
||||
"drivers/pci/controller/pcie-tegra264-ep.ko",
|
||||
"drivers/pci/controller/tegra-pcie-dma-lib.ko",
|
||||
"drivers/pci/controller/tegra-pcie-edma.ko",
|
||||
"drivers/pci/endpoint/functions/pci-epf-dma-test.ko",
|
||||
"drivers/pci/endpoint/functions/pci-epf-tegra-vnet.ko",
|
||||
"drivers/pinctrl/pinctrl-max77851.ko",
|
||||
"drivers/pinctrl/pinctrl-tegra194-pexclk-padctrl.ko",
|
||||
"drivers/pinctrl/pinctrl-tegra234-dpaux.ko",
|
||||
"drivers/platform/tegra/aon/tegra234-aon.ko",
|
||||
"drivers/platform/tegra/aon/tegra-aon-ivc-echo.ko",
|
||||
"drivers/platform/tegra/dce/tegra-dce.ko",
|
||||
"drivers/platform/tegra/mce/tegra-mce.ko",
|
||||
"drivers/platform/tegra/mc-hwpm.ko",
|
||||
"drivers/platform/tegra/mc-utils/mc-utils.ko",
|
||||
"drivers/platform/tegra/nvadsp/nvadsp.ko",
|
||||
"drivers/platform/tegra/psc/tegra23x_psc.ko",
|
||||
"drivers/platform/tegra/tegra-bootloader-debug.ko",
|
||||
"drivers/platform/tegra/tegra-cactmon-mc-all.ko",
|
||||
"drivers/platform/tegra/tegra-fsicom.ko",
|
||||
"drivers/platform/tegra/tegra-hv-xhci.ko",
|
||||
"drivers/platform/tegra/tegra-hv-xhci-debug.ko",
|
||||
"drivers/platform/tegra/tegra-uss-io-proxy.ko",
|
||||
"drivers/platform/tegra/uncore_pmu/tegra23x_perf_uncore.ko",
|
||||
"drivers/power/reset/max77851-poweroff.ko",
|
||||
"drivers/pwm/pwm-tegra-tachometer.ko",
|
||||
"drivers/ras/arm64-ras.ko",
|
||||
"drivers/regulator/max77851-regulator.ko",
|
||||
"drivers/rtc/nvvrs-pseq-rtc.ko",
|
||||
"drivers/rtc/rtc-max77851.ko",
|
||||
"drivers/scsi/ufs/ufs-tegra.ko",
|
||||
"drivers/soc/tegra/fuse/kfuse.ko",
|
||||
"drivers/spi/spi-aurix-tegra.ko",
|
||||
"drivers/spi/spi-tegra124-slave.ko",
|
||||
"drivers/spi/spi-tegra210-quad.ko",
|
||||
"drivers/thermal/max77851_thermal.ko",
|
||||
"drivers/tty/serial/wch_35x/wch.ko",
|
||||
"drivers/tty/serial/tegra_hv_comm.ko",
|
||||
"drivers/usb/typec/fusb301.ko",
|
||||
"drivers/video/tegra/camera/tegra_camera_platform.ko",
|
||||
"drivers/video/tegra/dc/bridge/maxim_gmsl_dp_serializer.ko",
|
||||
"drivers/video/tegra/dc/bridge/maxim_gmsl_hdmi_serializer.ko",
|
||||
"drivers/video/tegra/dc/bridge/nvdisp_serdes.ko",
|
||||
"drivers/video/tegra/dc/bridge/ti_fpdlink_dp_serializer.ko",
|
||||
"drivers/video/tegra/host/capture/nvhost-capture.ko",
|
||||
"drivers/video/tegra/host/nvcsi/nvhost-nvcsi.ko",
|
||||
"drivers/video/tegra/host/nvdla/nvhost-nvdla.ko",
|
||||
"drivers/video/tegra/nvmap/nvmap.ko",
|
||||
"drivers/video/tegra/tsec/tsecriscv.ko",
|
||||
"drivers/video/tegra/virt/tegra_gr_comm.ko",
|
||||
"drivers/virt/tegra/hvc_sysfs.ko",
|
||||
"drivers/virt/tegra/ivc-cdev.ko",
|
||||
"drivers/virt/tegra/tegra_hv.ko",
|
||||
"drivers/virt/tegra/tegra_hv_pm_ctl.ko",
|
||||
"drivers/virt/tegra/tegra_hv_vcpu_yield.ko",
|
||||
"drivers/virt/tegra/userspace_ivc_mempool.ko",
|
||||
"drivers/watchdog/max77851_wdt.ko",
|
||||
"drivers/watchdog/softdog-platform.ko",
|
||||
"drivers/watchdog/watchdog-tegra-t18x.ko",
|
||||
"sound/soc/tegra/snd-soc-tegra186-arad.ko",
|
||||
"sound/soc/tegra/snd-soc-tegra210-adsp.ko",
|
||||
"sound/soc/tegra/snd-soc-tegra210-afc.ko",
|
||||
"sound/soc/tegra/snd-soc-tegra210-iqc.ko",
|
||||
"sound/soc/tegra/snd-soc-tegra-controls.ko",
|
||||
"sound/soc/tegra/snd-soc-tegra-utils.ko",
|
||||
"sound/soc/tegra-virt-alt/snd-soc-tegra210-virt-alt-admaif.ko",
|
||||
"sound/soc/tegra-virt-alt/snd-soc-tegra210-virt-alt-adsp.ko",
|
||||
"sound/soc/tegra-virt-alt/snd-soc-tegra-virt-t210ref-pcm.ko",
|
||||
"sound/tegra-safety-audio/safety-i2s.ko",
|
||||
],
|
||||
kernel_build = "//nvidia-build/kleaf:tegra_android",
|
||||
deps = [
|
||||
"//hwpm/drivers/tegra/hwpm:hwpm",
|
||||
],
|
||||
)
|
||||
@@ -1,95 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra_virt_storage88/nvidia,tegra-hv-oops-storage.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Virtual OOPS storage device over Tegra Hypervisor IVC channel
|
||||
|
||||
maintainers:
|
||||
- Sreenivas Velpula
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-hv-oops-storage is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/block/tegra_oops_virt_storage/tegra_hv_vblk_oops.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /tegra_virt_storage88
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-hv-oops-storage
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
pstore_max_reason:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
pstore_kmsg_size:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
instance:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1f
|
||||
maximum: 0x1f
|
||||
|
||||
ivc:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xf
|
||||
maximum: 0x45
|
||||
|
||||
mempool:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1d
|
||||
maximum: 0x1d
|
||||
|
||||
partition-name:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- gos0-crashlogs
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra_virt_storage88 {
|
||||
};
|
||||
@@ -1,27 +0,0 @@
|
||||
Tegra Virtual Storage driver for OOPS partition
|
||||
|
||||
Virtual Storage Driver is the front end driver that interfaces with
|
||||
- the Storage Virtualization System for Tegra SOC OOPS partition and
|
||||
- the pstore system for storing OOPS/panic logs
|
||||
|
||||
Required Properties:
|
||||
- compatible: should be "nvidia,tegra-hv-oops-storage"
|
||||
- instance: to identify a specific instance of the device
|
||||
- ivc: ivc channel to used for communication with Virtualization System
|
||||
- mempool: mempool used for data transfers with Virtualization System
|
||||
- pstore_max_reason: one of KMSG_DUMP_* values from kmsg_dump.h. Driver only
|
||||
supports KMSG_DUMP_OOPS (value = 2) which allows PANIC and OOPS logs
|
||||
to be stored. KMSG logs above this reason level will be ignored.
|
||||
- pstore_kmsg_size: record size (should be block size aligned) for KMSG logs.
|
||||
Default is 64KB.
|
||||
|
||||
Example:
|
||||
tegra_virt_storage31 {
|
||||
compatible = "nvidia,tegra-hv-oops-storage";
|
||||
status = "okay";
|
||||
pstore_max_reason = <2>;
|
||||
pstore_kmsg_size = <0x10000>;
|
||||
instance = <31>;
|
||||
ivc = <&tegra_hv 230>;
|
||||
mempool = <69>;
|
||||
};
|
||||
@@ -1,104 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra_virt_storage79/nvidia,tegra-hv-storage.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Virtual storage device over Tegra Hypervisor IVC channel
|
||||
|
||||
maintainers:
|
||||
- Sreenivas Velpula
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-hv-storage is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/block/tegra_virt_storage/tegra_hv_vblk.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /tegra_virt_storage79
|
||||
- /tegra_virt_storage80
|
||||
- /tegra_virt_storage81
|
||||
- /tegra_virt_storage82
|
||||
- /tegra_virt_storage84
|
||||
- /tegra_virt_storage85
|
||||
- /tegra_virt_storage86
|
||||
- /tegra_virt_storage87
|
||||
- /tegra_virt_storage89
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-hv-storage
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
instance:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x3c
|
||||
|
||||
ivc:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xf
|
||||
maximum: 0x46
|
||||
|
||||
mempool:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x13
|
||||
maximum: 0x1e
|
||||
|
||||
partition-name:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- gos0-shared-pers
|
||||
- gos0-ufs
|
||||
- gos0_nvlog
|
||||
- pers-ota
|
||||
- ist-runtimeinfo
|
||||
- ist-resultdata
|
||||
- gos0-fs
|
||||
- gos0-rw-overlay
|
||||
- custom
|
||||
|
||||
|
||||
read-only:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra_virt_storage79 {
|
||||
};
|
||||
@@ -1,59 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/hyp/nvidia,tegra-hv.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra Hypervisor Driver Module
|
||||
|
||||
maintainers:
|
||||
- Sreenivas Velpula
|
||||
- Manish Bhardwaj
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-hv is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/block/tegra_virt_storage/tegra_hv_vblk.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/block/tegra_oops_virt_storage/tegra_hv_vblk_oops.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/virt/tegra/tegra_hv_vcpu_yield.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/virt/tegra/tegra_hv.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/virt/tegra/tegra_hv_pm_ctl.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/tegra-hv-xhci-debug.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/tegra-hv-xhci.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /hyp
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-hv
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
hyp {
|
||||
compatible = "nvidia,tegra-hv";
|
||||
status = "okay";
|
||||
phandle = <0x10>;
|
||||
};
|
||||
@@ -1,21 +0,0 @@
|
||||
Tegra Virtual Storage driver
|
||||
|
||||
Virtual Storage Driver is the front end driver that interfaces with the
|
||||
Storage Virtualization System for Tegra SOC and provides a block device
|
||||
interface
|
||||
|
||||
Required Properties:
|
||||
- compatible: should be "nvidia,tegra-hv-storage"
|
||||
- instance: to identify a specific instance of the device
|
||||
- ivc: ivc channel to used for communication with Virtualization System
|
||||
- mempool: mempool used for data transfers with Virtualization System
|
||||
|
||||
Example:
|
||||
tegra_virt_storage0 {
|
||||
compatible = "nvidia,tegra-hv-storage";
|
||||
instance = <0>;
|
||||
ivc = <&tegra_hv 63>;
|
||||
mempool = <10>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -1,64 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/aocluster@c000000/nvidia,tegra264-aocluster.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra AOCLUSTER Bus Driver
|
||||
|
||||
maintainers:
|
||||
- Akhilesh Khumbum
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-aocluster is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/bus/tegra-aocluster.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/aocluster@c000000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-aocluster
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
'#address-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
'#size-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
aocluster@c000000 {
|
||||
compatible = "nvidia,tegra264-aocluster";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x0 0xc000000 0x0 0xc000000 0x0 0x1000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,86 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer/arm,armv8-timer.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Architecture Timer
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = arm,armv8-timer is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/clocksource/arm_arch_timer.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /timer
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- arm,armv8-timer
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xa
|
||||
maximum: 0xe
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
|
||||
interrupt-parent:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
always-on:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
status = "disabled";
|
||||
interrupts = <GIC_PPI 13 8>,
|
||||
<GIC_PPI 14 8>,
|
||||
<GIC_PPI 11 8>,
|
||||
<GIC_PPI 10 8>,
|
||||
<GIC_PPI 12 8>;
|
||||
interrupt-parent = <&gic>;
|
||||
always-on;
|
||||
};
|
||||
@@ -1,103 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer@8000000/nvidia,tegra234-timer.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra Timers Module
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra234-timer is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/clocksource/timer-tegra186.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/timer@8000000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra234-timer
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8000000
|
||||
maximum: 0x8000000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x140000
|
||||
maximum: 0x140000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x305
|
||||
maximum: 0x308
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer@8000000 {
|
||||
compatible = "nvidia,tegra234-timer";
|
||||
reg = <0x0 0x08000000 0x0 0x00140000>;
|
||||
interrupts = <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,82 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ccplex@8120000000/nvidia,tegra264-ccplex-cluster.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra T264 cpufreq driver
|
||||
|
||||
maintainers:
|
||||
- Sumit Gupta
|
||||
- Mikko Perttunen
|
||||
- Rich Wiley
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-ccplex-cluster is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/cpufreq/tegra194-cpufreq.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/ccplex@8120000000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-ccplex-cluster
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,bpmp:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x30000000
|
||||
maximum: 0x30000000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xcf0000
|
||||
maximum: 0xcf0000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
ccplex@8120000000 {
|
||||
compatible = "nvidia,tegra264-ccplex-cluster";
|
||||
status = "disabled";
|
||||
nvidia,bpmp = <&bpmp>;
|
||||
reg = <0x81 0x30000000 0x0 0xcf0000>;
|
||||
};
|
||||
@@ -1,86 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/cc7/arm,idle-state.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM/ARM64 generic CPU idle driver
|
||||
|
||||
maintainers:
|
||||
- Rich Wiley
|
||||
|
||||
|
||||
description: |
|
||||
the compatability = arm,idle-state is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/cpuidle/cpuidle-psci.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/cpuidle/cpuidle-big_little.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/cpuidle/cpuidle-arm.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /cpus/idle-states/cc7
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- arm,idle-state
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
state-name:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- Cluster Powergate
|
||||
|
||||
|
||||
entry-latency-us:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1388
|
||||
maximum: 0x1388
|
||||
|
||||
exit-latency-us:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1388
|
||||
maximum: 0x1388
|
||||
|
||||
min-residency-us:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x61a8
|
||||
maximum: 0x61a8
|
||||
|
||||
arm,psci-suspend-param:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40000007
|
||||
maximum: 0x40000007
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
cc7 {
|
||||
compatible = "arm,idle-state";
|
||||
state-name = "Cluster Powergate";
|
||||
entry-latency-us = <5000>;
|
||||
exit-latency-us = <5000>;
|
||||
min-residency-us = <25000>;
|
||||
arm,psci-suspend-param = <0x40000007>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,60 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/psci/arm,psci-1.0.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Power State Coordination Interface (PSCI) standard interface for power management
|
||||
|
||||
maintainers:
|
||||
- Sanjay Chandrashekara
|
||||
|
||||
description: |
|
||||
the compatability = arm,psci-1.0 is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/cpuidle/cpuidle-psci-domain.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/firmware/psci/psci.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /psci
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- arm,psci-1.0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
method:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- smc
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
psci {
|
||||
compatible = "arm,psci-1.0";
|
||||
status = "disabled";
|
||||
method = "smc";
|
||||
};
|
||||
@@ -1,51 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/cpuidle/nvidia,cpuidle-tegra-auto.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra Automotive cpuidle Driver
|
||||
|
||||
maintainers:
|
||||
- Manish Bhardwaj
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,cpuidle-tegra-auto is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/cpuidle/cpuidle-tegra-auto.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /cpuidle
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,cpuidle-tegra-auto
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
cpuidle {
|
||||
compatible = "nvidia,cpuidle-tegra-auto";
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,93 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/vse@C0110000/nvidia,tegra-se-5.1-hv-vse-safety.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Virtual Security Engine driver over Tegra Hypervisor IVC channel
|
||||
|
||||
maintainers:
|
||||
- Mallikarjun Kasoju
|
||||
- Ashutosh Patel
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-se-5.1-hv-vse-safety is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/crypto/tegra-hv-vse-safety.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /vse@C0110000
|
||||
- /vse@C0120000
|
||||
- /vse@C0140000
|
||||
- /vse@C2430000
|
||||
- /vse@C2440000
|
||||
- /vse@C2460000
|
||||
- /vse@C24A0000
|
||||
- /vse@C24B0000
|
||||
- /vse@C24D0000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-se-5.1-hv-vse-safety
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
se-engine-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xc
|
||||
|
||||
nvidia,ivccfg_cnt:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,ivccfg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xffffff
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
vse@C0120000 {
|
||||
compatible = "nvidia,tegra-se-5.1-hv-vse-safety";
|
||||
iommus = <0x5 0x1809>;
|
||||
status = "okay";
|
||||
se-engine-id = <0x1>;
|
||||
nvidia,ivccfg_cnt = <0x1>;
|
||||
nvidia,ivccfg = <0x12e 0x1 0x0 0x0 0xffffff 0x8ea 0x1809 0x1 0x0 0x0 0x0>;
|
||||
};
|
||||
@@ -1,102 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto@8189880000/nvidia,tegra264-kds.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra Key Distribution System Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-kds is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/crypto/tegra/tegra-se-kds.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/crypto@8189880000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-kds
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x89880000
|
||||
maximum: 0x89880000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x25
|
||||
maximum: 0x25
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- se
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
crypto@8189880000 {
|
||||
compatible = "nvidia,tegra264-kds";
|
||||
reg = <0x81 0x89880000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA264_CLK_SE>;
|
||||
clock-names = "se";
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,123 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto@8188120000/nvidia,tegra264-se-aes.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra Security Engine Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-se-aes is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/crypto/tegra/tegra-se-main.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/crypto@8188120000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-se-aes
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x88120000
|
||||
maximum: 0x88120000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x25
|
||||
maximum: 0x25
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- se
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1802
|
||||
maximum: 0x1802
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
crypto@8188120000 {
|
||||
compatible = "nvidia,tegra264-se-aes";
|
||||
reg = <0x81 0x88120000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA264_CLK_SE>;
|
||||
clock-names = "se";
|
||||
iommus = <&smmu1_mmu TEGRA_SID_SE_SE2>;
|
||||
dma-coherent;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,123 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto@8188140000/nvidia,tegra264-se-hash.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Crypto driver for NVIDIA Security Engine in Tegra Chips
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-se-hash is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/crypto/tegra/tegra-se-main.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/crypto@8188140000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-se-hash
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x88140000
|
||||
maximum: 0x88140000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x25
|
||||
maximum: 0x25
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- se
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1804
|
||||
maximum: 0x1804
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
crypto@8188140000 {
|
||||
compatible = "nvidia,tegra264-se-hash";
|
||||
reg = <0x81 0x88140000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA264_CLK_SE>;
|
||||
clock-names = "se";
|
||||
iommus = <&smmu1_mmu TEGRA_SID_SE_SE4>;
|
||||
dma-coherent;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,123 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto@8188110000/nvidia,tegra264-se-sm4.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Crypto Module for NVIDIA Security Engine in Tegra Chips
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-se-sm4 is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/crypto/tegra/tegra-se-main.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/crypto@8188110000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-se-sm4
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x88110000
|
||||
maximum: 0x88110000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x25
|
||||
maximum: 0x25
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- se
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1801
|
||||
maximum: 0x1801
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
crypto@8188110000 {
|
||||
compatible = "nvidia,tegra264-se-sm4";
|
||||
reg = <0x81 0x88110000 0x0 0x10000>;
|
||||
clocks = <&bpmp TEGRA264_CLK_SE>;
|
||||
clock-names = "se";
|
||||
iommus = <&smmu1_mmu TEGRA_SID_SE_SE1>;
|
||||
dma-coherent;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,210 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/dma-controller@9440000/nvidia,tegra264-adma.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra ADMA driver
|
||||
|
||||
maintainers:
|
||||
- Mohan Kumar
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-adma is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/dma/tegra210-adma.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/aconnect@9000000/dma-controller@9440000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-adma
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x9450000
|
||||
maximum: 0x9450000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
interrupt-parent:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x90
|
||||
maximum: 0xbf
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
'#dma-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xa3
|
||||
maximum: 0xa3
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- d_audio
|
||||
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- vm
|
||||
|
||||
|
||||
dma-channel-mask:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xffff
|
||||
maximum: 0xffffffff
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
dma-controller@9440000 {
|
||||
compatible = "nvidia,tegra264-adma";
|
||||
reg = <0x0 0x9440000 0x0 0xb0000>;
|
||||
interrupt-parent = <&agic_page0>;
|
||||
interrupts = <GIC_SPI 0x90 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x91 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x92 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x93 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x94 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x95 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x96 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x97 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x98 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x99 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x9a IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x9b IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x9c IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x9d IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x9e IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x9f IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xa9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xaa IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xab IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xac IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xad IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xae IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xaf IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xb9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xba IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xbb IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xbc IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xbd IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xbe IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xbf IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xc9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xca IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xcb IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xcc IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xcd IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xce IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0xcf IRQ_TYPE_LEVEL_HIGH>;
|
||||
#dma-cells = <1>;
|
||||
clocks = <&bpmp TEGRA264_CLK_AHUB>;
|
||||
clock-names = "d_audio";
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,163 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/dma-controller@8400000/nvidia,tegra264-gpcdma.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra GPC DMA Controller driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-gpcdma is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/dma/tegra186-gpc-dma.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/dma-controller@8400000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-gpcdma
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8400000
|
||||
maximum: 0x8400000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x210000
|
||||
maximum: 0x210000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x248
|
||||
maximum: 0x267
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
'#dma-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x800
|
||||
maximum: 0x800
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
dma-channel-mask:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xf70dc3fe
|
||||
maximum: 0xf70dc3fe
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
dma-controller@8400000 {
|
||||
compatible = "nvidia,tegra264-gpcdma";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x08400000 0x0 0x210000>;
|
||||
interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 609 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#dma-cells = <3>;
|
||||
iommus = <&smmu1_mmu 0x00000800>;
|
||||
dma-coherent;
|
||||
dma-channel-mask = <0xfffffffe>;
|
||||
};
|
||||
@@ -1,104 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bpmp/nvidia,tegra194-safe-bpmp-hv.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Virtual BPMP Driver
|
||||
|
||||
maintainers:
|
||||
- Sharif Shaik
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra194-safe-bpmp-hv is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/firmware/tegra/bpmp-tegra186-hv.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/virt.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bpmp
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra194-safe-bpmp-hv
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
mboxes:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x13
|
||||
maximum: 0x13
|
||||
|
||||
'#clock-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#reset-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#power-domain-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
numa-node-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
ivc_queue:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xf
|
||||
|
||||
mempool:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
bpmp {
|
||||
compatible = "nvidia,tegra264-bpmp",
|
||||
"nvidia,tegra234-bpmp",
|
||||
"nvidia,tegra186-bpmp";
|
||||
status = "disabled";
|
||||
mboxes = <&top_hsp0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_BPMP>;
|
||||
memory-region = <&dram_cpu_bpmp_mail>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
numa-node-id = <0>;
|
||||
};
|
||||
@@ -1,132 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/gpio@cf00000/nvidia,tegra264-gpio-aon.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra GPIO Controller Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-gpio-aon is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/gpio/gpio-tegra186.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/gpio@cf00000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-gpio-aon
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- security
|
||||
- gpio
|
||||
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xcf00000
|
||||
maximum: 0xcf10000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x10000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x21a
|
||||
maximum: 0x21d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
gpio-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#gpio-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
interrupt-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#interrupt-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
gpio@cf00000 {
|
||||
reg-names = "security, gpio";
|
||||
compatible = "nvidia,tegra264-gpio-aon";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x0cf00000 0x0 0x10000>,
|
||||
<0x0 0x0cf10000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
@@ -1,160 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/gpio@810c300000/nvidia,tegra264-gpio-main.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra GPIO controller driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-gpio-main is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/gpio/gpio-tegra186.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/gpio@810c300000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-gpio-main
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- security
|
||||
- gpio
|
||||
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc300000
|
||||
maximum: 0xc310000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4000
|
||||
maximum: 0x4000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5b
|
||||
maximum: 0x7a
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
gpio-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#gpio-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
interrupt-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#interrupt-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
gpio@810c300000 {
|
||||
reg-names = "security, gpio";
|
||||
compatible = "nvidia,tegra264-gpio-main";
|
||||
status = "disabled";
|
||||
reg = <0x81 0x0c300000 0x0 0x4000>,
|
||||
<0x81 0x0c310000 0x0 0x4000>;
|
||||
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
@@ -1,148 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/gpio@a808300000/nvidia,tegra264-gpio-uphy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra GPIO controller driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-gpio-uphy is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/gpio/gpio-tegra186.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/gpio@a808300000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-gpio-uphy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- security
|
||||
- gpio
|
||||
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xa8
|
||||
maximum: 0xa8
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8300000
|
||||
maximum: 0x8310000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2000
|
||||
maximum: 0x2000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x34b
|
||||
maximum: 0x35a
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
gpio-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#gpio-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
interrupt-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#interrupt-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
pinctrl-node:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
gpio@a808300000 {
|
||||
reg-names = "security, gpio";
|
||||
compatible = "nvidia,tegra264-gpio-uphy";
|
||||
status = "disabled";
|
||||
reg = <0xa8 0x08300000 0x0 0x2000>,
|
||||
<0xa8 0x08310000 0x0 0x2000>;
|
||||
interrupts = <GIC_SPI 843 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 845 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 847 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 850 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 851 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 853 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 854 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 855 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
pinctrl-node = <&padctl_uphy>;
|
||||
};
|
||||
@@ -1,78 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinmux@810c281000/nvidia,tegra264-pinmux-main.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra PINMUX driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-pinmux-main is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/gpio/gpio-tegra186.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/pinctrl/tegra/pinctrl-tegra264-generic.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/pinctrl/tegra/pinctrl-tegra264.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/pinmux@810c281000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-pinmux-main
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc281000
|
||||
maximum: 0xc281000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc000
|
||||
maximum: 0xc000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
pinmux@810c281000 {
|
||||
compatible = "nvidia,tegra264-pinmux-main";
|
||||
status = "disabled";
|
||||
reg = <0x81 0x0c281000 0x0 0xc000>;
|
||||
};
|
||||
@@ -1,77 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinmux@a8082e0000/nvidia,tegra264-pinmux-uphy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra PINMUX driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-pinmux-uphy is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/gpio/gpio-tegra186.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/pinctrl/tegra/pinctrl-tegra264-generic.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/pinmux@a8082e0000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-pinmux-uphy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xa8
|
||||
maximum: 0xa8
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x82e0000
|
||||
maximum: 0x82e0000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4000
|
||||
maximum: 0x4000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
pinmux@a8082e0000 {
|
||||
compatible = "nvidia,tegra264-pinmux-uphy";
|
||||
status = "disabled";
|
||||
reg = <0xa8 0x082e0000 0x0 0x4000>;
|
||||
};
|
||||
@@ -1,117 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/vi0@8188400000/nvidia,tegra234-vi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra Video Interface Module
|
||||
|
||||
maintainers:
|
||||
- Chinniah Poosapadi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra234-vi is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/drm.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/vic.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/host/capture/capture-support.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/host/vi/vi5.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/vi0@8188400000
|
||||
- /bus@0/host1x@8181200000/vi1@8188c00000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra234-vi
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2e
|
||||
maximum: 0x2f
|
||||
|
||||
reset-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- vi
|
||||
- vi2
|
||||
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x39
|
||||
maximum: 0x39
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- vi
|
||||
|
||||
|
||||
nvidia,vi-falcon-device:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
non-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- resets
|
||||
- reset-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
vi0@8188400000 {
|
||||
compatible = "nvidia,tegra234-vi";
|
||||
resets = <&bpmp TEGRA264_RESET_VI>;
|
||||
reset-names = "vi";
|
||||
clocks = <&bpmp TEGRA264_CLK_VI>;
|
||||
clock-names = "vi";
|
||||
nvidia,vi-falcon-device = <&vi0_thi>;
|
||||
iommus = <&smmu0_mmu TEGRA_SID_VI_VM1>;
|
||||
non-coherent;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,135 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/vic@8188050000/nvidia,tegra264-host1x-virtual-engine.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Host1x Virtualization Driver for Tegra Hypervisor
|
||||
|
||||
maintainers:
|
||||
- Santosh B S
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-host1x-virtual-engine is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/virt.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/drm.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/vic@8188050000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-host1x-virtual-engine
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3b
|
||||
maximum: 0x3b
|
||||
|
||||
interconnects:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6c
|
||||
maximum: 0x6d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
interconnect-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- dma-mem
|
||||
- write
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3000
|
||||
maximum: 0x3000
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
numa-node-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,class:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5d
|
||||
maximum: 0x5d
|
||||
|
||||
nvidia,module-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
vic@8188050000 {
|
||||
compatible = "nvidia,tegra264-vic";
|
||||
reg = <0x81 0x88050000 0x00 0x40000>;
|
||||
interrupts = <GIC_SPI 0x1d4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&bpmp TEGRA264_POWER_DOMAIN_VIC>;
|
||||
resets = <&bpmp TEGRA264_RESET_VIC>;
|
||||
reset-names = "vic";
|
||||
clocks = <&bpmp TEGRA264_CLK_VIC>;
|
||||
clock-names = "vic";
|
||||
interconnects = <&mc TEGRA264_MEMORY_CLIENT_VICR &emc>,
|
||||
<&mc TEGRA264_MEMORY_CLIENT_VICW &emc>;
|
||||
interconnect-names = "dma-mem, write";
|
||||
iommus = <&smmu1_mmu TEGRA_SID_VIC>;
|
||||
dma-coherent;
|
||||
numa-node-id = <0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,289 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/host1x@8181200000/nvidia,tegra264-host1x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Host1x driver for Tegra products
|
||||
|
||||
maintainers:
|
||||
- Santosh B S
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-host1x is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/virt.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/drm.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x-nvhost/nvhost.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x-fence/dev.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x/dev.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/crypto/tegra-hv-vse-safety.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-host1x
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81240000
|
||||
maximum: 0x81320000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x20000
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- vm
|
||||
- actmon
|
||||
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x145
|
||||
maximum: 0x14e
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
interrupt-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- syncpt0
|
||||
- syncpt1
|
||||
- syncpt2
|
||||
- syncpt3
|
||||
- syncpt4
|
||||
- syncpt5
|
||||
- syncpt6
|
||||
- syncpt7
|
||||
- host1x
|
||||
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0xe
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- host1x
|
||||
- actmon
|
||||
|
||||
|
||||
interconnects:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x16
|
||||
maximum: 0x16
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
interconnect-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- dma-mem
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xb01
|
||||
maximum: 0xb01
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#address-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
'#size-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
iommu-map:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x7
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3001
|
||||
maximum: 0x3008
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
numa-node-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,channels:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x1d
|
||||
|
||||
nvidia,syncpoints:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x240
|
||||
|
||||
nvidia,server-ivc:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xf
|
||||
maximum: 0x2a
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
host1x@8181200000 {
|
||||
compatible = "nvidia,tegra264-host1x";
|
||||
reg = <0x81 0x81200000 0x0 0x10000>,
|
||||
<0x81 0x81210000 0x0 0x10000>,
|
||||
<0x81 0x81240000 0x0 0x10000>,
|
||||
<0x81 0x81320000 0x0 0x20000>;
|
||||
reg-names = "common, hypervisor, vm, actmon";
|
||||
interrupts = <GIC_SPI 0x147 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x148 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x14a IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x14b IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x14c IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x14d IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x14e IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 0x145 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "syncpt0",
|
||||
"syncpt1",
|
||||
"syncpt2",
|
||||
"syncpt3",
|
||||
"syncpt4",
|
||||
"syncpt5",
|
||||
"syncpt6",
|
||||
"syncpt7",
|
||||
"host1x";
|
||||
clocks = <&bpmp TEGRA264_CLK_HOST1X>,
|
||||
<&bpmp TEGRA264_CLK_OSC>;
|
||||
clock-names = "host1x, actmon";
|
||||
interconnects = <&mc TEGRA264_MEMORY_CLIENT_HOST1XR &emc>;
|
||||
interconnect-names = "dma-mem";
|
||||
iommus = <&smmu1_mmu TEGRA_SID_HOST1X>;
|
||||
dma-coherent;
|
||||
#address-cells = <0x2>;
|
||||
#size-cells = <0x2>;
|
||||
iommu-map = <0x0 &smmu1_mmu (TEGRA_SID_VIC+0x1) 0x1>,
|
||||
<0x1 &smmu1_mmu (TEGRA_SID_VIC+0x2) 0x1>,
|
||||
<0x2 &smmu1_mmu (TEGRA_SID_VIC+0x3) 0x1>,
|
||||
<0x3 &smmu1_mmu (TEGRA_SID_VIC+0x4) 0x1>,
|
||||
<0x4 &smmu1_mmu (TEGRA_SID_VIC+0x5) 0x1>,
|
||||
<0x5 &smmu1_mmu (TEGRA_SID_VIC+0x6) 0x1>,
|
||||
<0x6 &smmu1_mmu (TEGRA_SID_VIC+0x7) 0x1>,
|
||||
<0x7 &smmu1_mmu (TEGRA_SID_VIC+0x8) 0x1>;
|
||||
ranges = <0x81 0x81200000 0x81 0x81200000 0x00 0x10000>,
|
||||
<0x81 0x81210000 0x81 0x81210000 0x00 0x10000>,
|
||||
<0x81 0x81240000 0x81 0x81240000 0x00 0x10000>,
|
||||
<0x81 0x88150000 0x81 0x88150000 0x00 0x40000>,
|
||||
<0x81 0x88050000 0x81 0x88050000 0x00 0x40000>,
|
||||
<0x81 0x8c000000 0x81 0x8c000000 0x00 0x900000>,
|
||||
<0x00 0x10700000 0x00 0x10700000 0x00 0x100000>,
|
||||
<0x81 0x88140000 0x81 0x88140000 0x00 0x10000>,
|
||||
<0x81 0x88120000 0x81 0x88120000 0x00 0x10000>,
|
||||
<0x81 0x88110000 0x81 0x88110000 0x00 0x10000>,
|
||||
<0x81 0x89880000 0x81 0x89880000 0x00 0x10000>,
|
||||
<0x81 0x88800000 0x81 0x88800000 0x00 0x300000>;
|
||||
numa-node-id = <0x0>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,115 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/hardware-timestamp@c2b0000/nvidia,tegra264-gte-aon.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra HTE (Hardware Timestamping Engine) Driver
|
||||
|
||||
maintainers:
|
||||
- Dipen Patel
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-gte-aon is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/hte/hte-tegra194.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/hardware-timestamp@c2b0000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-gte-aon
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc2b0000
|
||||
maximum: 0xc2b0000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x226
|
||||
maximum: 0x226
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
nvidia,int-threshold:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#timestamp-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,gpio-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
hardware-timestamp@c2b0000 {
|
||||
compatible = "nvidia,tegra264-gte-aon";
|
||||
reg = <0x0 0x0c2b0000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 0x00000226 IRQ_TYPE_LEVEL_HIGH>;
|
||||
nvidia,int-threshold = <1>;
|
||||
#timestamp-cells = <1>;
|
||||
nvidia,gpio-controller = <&gpio_aon>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,111 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/hardware-timestamp@8380000/nvidia,tegra264-gte-lic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra HTE (Hardware Timestamping Engine) Driver
|
||||
|
||||
maintainers:
|
||||
- Dipen Patel
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-gte-lic is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/hte/hte-tegra194.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/hardware-timestamp@8380000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-gte-lic
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8380000
|
||||
maximum: 0x8380000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x268
|
||||
maximum: 0x268
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
nvidia,int-threshold:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#timestamp-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
hardware-timestamp@8380000 {
|
||||
compatible = "nvidia,tegra264-gte-lic";
|
||||
reg = <0x0 0x08380000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 0x00000268 IRQ_TYPE_LEVEL_HIGH>;
|
||||
nvidia,int-threshold = <1>;
|
||||
#timestamp-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,107 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/temp-sensor@4c/ti,tmp451.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: LM90/ADM1032 driver
|
||||
|
||||
maintainers:
|
||||
- Yi-Wei Wang
|
||||
|
||||
description: |
|
||||
the compatability = ti,tmp451 is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/hwmon/lm90.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bpmp/i2c/temp-sensor@4c
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- ti,tmp451
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4c
|
||||
maximum: 0x4c
|
||||
|
||||
sensor-name:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- tmp451-ext-soc
|
||||
|
||||
|
||||
'#thermal-sensor-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
interrupt-parent:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4e
|
||||
maximum: 0x4e
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x9
|
||||
|
||||
temp-alert-gpio:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x4e
|
||||
|
||||
offset:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xfffff060
|
||||
maximum: 0xfffff060
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
temp-sensor@4c {
|
||||
};
|
||||
@@ -1,244 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/i2c@c600000/nvidia,tegra264-i2c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra I2C Bus Controller driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-i2c is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/i2c/busses/i2c-tegra.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/i2c@c600000
|
||||
- /bus@0/i2c@c610000
|
||||
- /bus@0/i2c@810c410000
|
||||
- /bus@0/i2c@810c420000
|
||||
- /bus@0/i2c@810c430000
|
||||
- /bus@0/i2c@810c630000
|
||||
- /bus@0/i2c@810c640000
|
||||
- /bus@0/i2c@810c650000
|
||||
- /bus@0/i2c@810c670000
|
||||
- /bus@0/i2c@810c680000
|
||||
- /bus@0/i2c@810c690000
|
||||
- /bus@0/i2c@810c6a0000
|
||||
- /bus@0/i2c@810c6b0000
|
||||
- /bus@0/i2c@810c6c0000
|
||||
- /bus@0/i2c@810c6d0000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-i2c
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc410000
|
||||
maximum: 0xc6d0000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7e
|
||||
maximum: 0x215
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
clock-frequency:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x61a80
|
||||
maximum: 0x61a80
|
||||
|
||||
dmas:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x14
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1f
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x801
|
||||
maximum: 0x81f
|
||||
|
||||
dma-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- tx
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x801
|
||||
maximum: 0x81f
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xd
|
||||
maximum: 0xa0
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- div-clk
|
||||
- parent
|
||||
|
||||
|
||||
assigned-clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xd
|
||||
maximum: 0x2f
|
||||
|
||||
assigned-clock-parents:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x16
|
||||
maximum: 0xa0
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xb
|
||||
maximum: 0x3c
|
||||
|
||||
reset-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- i2c
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- iommus
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c@c600000 {
|
||||
compatible = "nvidia,tegra264-i2c";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x0c600000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <400000>;
|
||||
dmas = <&gpcdma 3 3 TEGRA264_GPCDMA_SID_I2C2>;
|
||||
dma-names = "tx";
|
||||
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_I2C2>;
|
||||
dma-coherent;
|
||||
clocks = <&bpmp TEGRA264_CLK_AON_I2C>,
|
||||
<&bpmp TEGRA264_CLK_PLLAON>;
|
||||
clock-names = "div-clk, parent";
|
||||
assigned-clocks = <&bpmp TEGRA264_CLK_AON_I2C>;
|
||||
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLAON>;
|
||||
resets = <&bpmp TEGRA264_RESET_I2C2>;
|
||||
reset-names = "i2c";
|
||||
};
|
||||
@@ -1,60 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/gpio-keys/gpio-keys.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Keyboard driver for GPIOs
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = gpio-keys is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/input/keyboard/gpio_keys.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/input/keyboard/gpio_keys_polled.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/input/misc/soc_button_array.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/mfd/ucb1x00-assabet.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/mfd/rohm-bd71828.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/mfd/rohm-bd718x7.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/platform/x86/barco-p50-gpio.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/platform/x86/meraki-mx100.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/platform/x86/pcengines-apuv2.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/platform/x86/x86-android-tablets.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /gpio-keys
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- gpio-keys
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,141 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra-hsp@8800000/nvidia,tegra264-hsp-hv.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hypervisor Hardware Syncronization Primatives (HSP) Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-hsp-hv is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/mailbox/tegra-hsp.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/tegra-hsp@8800000
|
||||
- /bus@0/tegra-hsp@8c00000
|
||||
- /bus@0/tegra-hsp@8d00000
|
||||
- /bus@0/tegra-hsp@8189100000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-hsp-hv
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8800000
|
||||
maximum: 0x89100000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc0000
|
||||
maximum: 0xd0000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x19f
|
||||
maximum: 0x2a5
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
interrupt-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- doorbell
|
||||
- shared0
|
||||
- shared1
|
||||
- shared2
|
||||
- shared3
|
||||
- shared4
|
||||
- shared5
|
||||
- shared6
|
||||
- shared7
|
||||
|
||||
|
||||
'#mbox-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
nvidia,mbox-ie:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra-hsp@8800000 {
|
||||
compatible = "nvidia,tegra264-hsp",
|
||||
"nvidia,tegra234-hsp",
|
||||
"nvidia,tegra186-hsp";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x08800000 0x0 0xd0000>;
|
||||
interrupts = <GIC_SPI 620 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 622 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 624 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 626 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 628 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 629 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "doorbell, shared0, shared1, shared2",
|
||||
"shared3",
|
||||
"shared4, shared5, shared6, shared7";
|
||||
#mbox-cells = <2>;
|
||||
nvidia,mbox-ie;
|
||||
};
|
||||
@@ -1,142 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra-hsp@818c160000/nvidia,tegra264-hsp.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hypervisor Hardware Syncronization Primatives (HSP) Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-hsp is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/mailbox/tegra-hsp.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/tegra-hsp@818c160000
|
||||
- /bus@0/tegra-hsp@8189200000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-hsp
|
||||
- nvidia,tegra234-hsp
|
||||
- nvidia,tegra186-hsp
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x89200000
|
||||
maximum: 0x8c160000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x90000
|
||||
maximum: 0xc0000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x190
|
||||
maximum: 0x1a6
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
interrupt-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- shared0
|
||||
- shared1
|
||||
- shared2
|
||||
- shared3
|
||||
- shared4
|
||||
|
||||
|
||||
nvidia,num-SM:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
|
||||
nvidia,num-SS:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
nvidia,num-SI:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5
|
||||
maximum: 0x5
|
||||
|
||||
nvidia,mbox-ie:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#mbox-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra-hsp@818c160000 {
|
||||
compatible = "nvidia,tegra264-hsp";
|
||||
reg = <0x81 0x8c160000 0x0 0x00090000>;
|
||||
interrupts = <0 400 0x04>;
|
||||
interrupt-names = "shared0";
|
||||
nvidia,num-SM = <0x8>;
|
||||
nvidia,num-SS = <0x4>;
|
||||
nvidia,num-SI = <0x5>;
|
||||
nvidia,mbox-ie;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,89 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tsc_sig_gen@c230000/nvidia,tegra264-cdi-tsc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cam Fsync Driver
|
||||
|
||||
maintainers:
|
||||
- Mohit Ingale
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-cdi-tsc is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/cam_fsync/cam_fsync.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /tsc_sig_gen@c230000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-cdi-tsc
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc230000
|
||||
maximum: 0xc230000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x18
|
||||
maximum: 0x18
|
||||
|
||||
'#address-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#size-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
tsc_sig_gen@c230000 {
|
||||
compatible = "nvidia,tegra264-cam-cdi-tsc";
|
||||
ranges = <0x0 0x0 0xc230000 0x10000>;
|
||||
reg = <0x0 0xc230000 0x0 0x18>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,67 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra-capture-isp/nvidia,tegra-camrtc-capture-isp.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra Capture-ISP driver
|
||||
|
||||
maintainers:
|
||||
- Evgeny Kornev
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-camrtc-capture-isp is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/camera/fusa-capture/capture-isp.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /tegra-capture-isp
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-camrtc-capture-isp
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,isp-devices:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
nvidia,isp-max-channels:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x20
|
||||
maximum: 0x20
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra-capture-isp {
|
||||
compatible = "nvidia,tegra-camrtc-capture-isp";
|
||||
nvidia,isp-devices = <&isp &isp1>;
|
||||
nvidia,isp-max-channels = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,101 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra-capture-vi/nvidia,tegra-camrtc-capture-vi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra Capture-ISP driver
|
||||
|
||||
maintainers:
|
||||
- Evgeny Kornev
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-camrtc-capture-vi is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/camera/fusa-capture/capture-vi.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /tegra-capture-vi
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-camrtc-capture-vi
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,vi-devices:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
nvidia,vi-mapping-size:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6
|
||||
maximum: 0x6
|
||||
|
||||
nvidia,vi-mapping:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x5
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,vi-mapping-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- csi-stream-id
|
||||
- vi-unit-id
|
||||
|
||||
|
||||
nvidia,vi-max-channels:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x48
|
||||
maximum: 0x48
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra-capture-vi {
|
||||
compatible = "nvidia,tegra-camrtc-capture-vi";
|
||||
nvidia,vi-devices = <&vi0 &vi1>;
|
||||
nvidia,vi-mapping-size = <6>;
|
||||
nvidia,vi-mapping = <0 0>,
|
||||
<1 0>,
|
||||
<2 1>,
|
||||
<3 1>,
|
||||
<4 0>,
|
||||
<5 1>;
|
||||
nvidia,vi-mapping-names = "csi-stream-id, vi-unit-id";
|
||||
nvidia,vi-max-channels = <72>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,61 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sipl_devblk_7/nvidia,cdi-mgr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra Automotive CDI Manager Driver
|
||||
|
||||
maintainers:
|
||||
- Frank Chen
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,cdi-mgr is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/cdi/cdi_mgr.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /sipl_devblk_7
|
||||
- /sipl_devblk_9
|
||||
- /sipl_devblk_0
|
||||
- /sipl_devblk_12
|
||||
- /sipl_devblk_1
|
||||
- /sipl_devblk_3
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,cdi-mgr
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
pwdn-gpios:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x5a
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
sipl_devblk_7 {
|
||||
compatible = "nvidia,cdi-mgr";
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,64 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/cim_ver/nvidia,cim_ver.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra Automotive CDI Manager Driver
|
||||
|
||||
maintainers:
|
||||
- Frank Chen
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,cim_ver is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/cdi/cdi_mgr.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/cdi/cdi_dev.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /cim_ver
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,cim_ver
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
cim_ver:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- cim_ver_a02
|
||||
|
||||
|
||||
cim_frsync_src:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
cim_ver {
|
||||
compatible = "nvidia,cim_ver";
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,98 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/isc-mgr.0/nvidia,isc-mgr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra Autotive ISC Manager Driver
|
||||
|
||||
maintainers:
|
||||
- Frank Chen
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,isc-mgr is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/isc/isc_mgr.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /isc-mgr.0
|
||||
- /isc-mgr.1
|
||||
- /isc-mgr.2
|
||||
- /isc-mgr.3
|
||||
- /isc-mgr.4
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,isc-mgr
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
i2c-bus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xc
|
||||
|
||||
csi-port:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x6
|
||||
|
||||
cphy-map-trio0:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- A_B_C
|
||||
|
||||
|
||||
cphy-map-trio1:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- C_A_B
|
||||
|
||||
|
||||
cphy-map-trio2:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- A_B_C
|
||||
|
||||
|
||||
cphy-map-trio3:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- C_A_B
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
isc-mgr.0 {
|
||||
compatible = "nvidia,isc-mgr"; 7095 » » i2c-bus = <0x7>;
|
||||
csi-port = <0x0>;
|
||||
cphy-map-trio0 = "A_B_C";
|
||||
cphy-map-trio1 = "C_A_B";
|
||||
cphy-map-trio2 = "A_B_C";
|
||||
cphy-map-trio3 = "C_A_B";
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,73 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
# SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/smmu-hwpm@810aa30000/nvidia,t264-smmu-hwpm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra264 SMMU-HWPM driver
|
||||
|
||||
maintainers:
|
||||
- Pritesh Raithatha
|
||||
- Ketan Patil
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,t264-smmu-hwpm is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/memory/tegra/smmu-hwpm.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/smmu-hwpm@810aa30000
|
||||
- /bus@0/smmu-hwpm@8105a30000
|
||||
- /bus@0/smmu-hwpm@8106a30000
|
||||
- /bus@0/smmu-hwpm@8806a30000
|
||||
- /bus@0/smmu-hwpm@810ba30000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,t264-smmu-hwpm
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x88
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5a30000
|
||||
maximum: 0xba30000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
smmu-hwpm@810aa30000 {
|
||||
compatible = "nvidia,t264-smmu-hwpm";
|
||||
reg = <0x81 0x0aa30000 0x0 0x10000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,85 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
# SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/memory-controller-hwpm@8108020000/nvidia,tegra-t264-mc-hwpm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra264 MC-HWPM driver
|
||||
|
||||
maintainers:
|
||||
- Pritesh Raithatha
|
||||
- Ketan Patil
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-t264-mc-hwpm is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/memory/tegra/tegra264-mc-hwpm.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/memory-controller-hwpm@8108020000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-t264-mc-hwpm
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8020000
|
||||
maximum: 0x8220000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x20000
|
||||
maximum: 0x20000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
memory-controller-hwpm@8108020000 {
|
||||
compatible = "nvidia,tegra-t264-mc-hwpm";
|
||||
reg = <0x81 0x8020000 0x0 0x20000>,
|
||||
<0x81 0x8040000 0x0 0x20000>,
|
||||
<0x81 0x8060000 0x0 0x20000>,
|
||||
<0x81 0x8080000 0x0 0x20000>,
|
||||
<0x81 0x80a0000 0x0 0x20000>,
|
||||
<0x81 0x80c0000 0x0 0x20000>,
|
||||
<0x81 0x80e0000 0x0 0x20000>,
|
||||
<0x81 0x8100000 0x0 0x20000>,
|
||||
<0x81 0x8120000 0x0 0x20000>,
|
||||
<0x81 0x8140000 0x0 0x20000>,
|
||||
<0x81 0x8160000 0x0 0x20000>,
|
||||
<0x81 0x8180000 0x0 0x20000>,
|
||||
<0x81 0x81a0000 0x0 0x20000>,
|
||||
<0x81 0x81c0000 0x0 0x20000>,
|
||||
<0x81 0x81e0000 0x0 0x20000>,
|
||||
<0x81 0x8200000 0x0 0x20000>,
|
||||
<0x81 0x8220000 0x0 0x20000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,94 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
# SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/memqual@f020000/nvidia,tegra-t264-mem-qual.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Mem Qual IOVA Mapping Provider
|
||||
|
||||
maintainers:
|
||||
- Ketan Patil
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-t264-mem-qual is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/memory/tegra/mem-qual.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/memqual@f020000
|
||||
- /bus@0/memqual@a808730000
|
||||
- /bus@0/memqual@818d020000
|
||||
- /bus@0/memqual@a808750000
|
||||
- /bus@0/memqual@818d030000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-t264-mem-qual
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xa8
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8730000
|
||||
maximum: 0x8d030000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x3f00
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
memqual@f020000 {
|
||||
compatible = "nvidia,tegra-t264-mem-qual";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x0f020000 0x0 0x10000>;
|
||||
iommus = <&smmu1_mmu TEGRA_SID_MIU0>,
|
||||
<&smmu1_mmu TEGRA_SID_MIU1>;
|
||||
dma-coherent;
|
||||
};
|
||||
@@ -1,68 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
# SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mc_carveout@8108020000/nvidia,tegra-t26x-mc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra Memory Controller driver
|
||||
|
||||
maintainers:
|
||||
- Ashish Mhetre
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-t26x-mc is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/memory/tegra/mc-t26x.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/mc_carveout@8108020000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-t26x-mc
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8020000
|
||||
maximum: 0x8020000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x20000
|
||||
maximum: 0x20000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
mc_carveout@8108020000 {
|
||||
compatible = "nvidia,tegra-t26x-mc";
|
||||
reg = <0x81 0x08020000 0x0 0x20000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,144 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/external-memory-controller@8108800000/nvidia,tegra264-emc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra External Memory Controller driver
|
||||
|
||||
maintainers:
|
||||
- Sachin Nikam
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-emc is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/memory/tegra/tegra186-emc.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/memory-controller@8108020000/external-memory-controller@8108800000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-emc
|
||||
- nvidia,tegra234-emc
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8800000
|
||||
maximum: 0x8890000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x20000
|
||||
maximum: 0x20000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8d
|
||||
maximum: 0x8d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x122
|
||||
maximum: 0x122
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- emc
|
||||
|
||||
|
||||
'#interconnect-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,bpmp:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
numa-node-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
external-memory-controller@8108800000 {
|
||||
compatible = "nvidia,tegra264-emc",
|
||||
"nvidia,tegra234-emc";
|
||||
status = "disabled";
|
||||
reg = <0x81 0x08800000 0x0 0x20000>,
|
||||
<0x81 0x08890000 0x0 0x20000>;
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA264_CLK_EMC>;
|
||||
clock-names = "emc";
|
||||
#interconnect-cells = <0>;
|
||||
nvidia,bpmp = <&bpmp>;
|
||||
numa-node-id = <0x0>;
|
||||
};
|
||||
@@ -1,260 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/l2-cache-0/cache.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cache Storage Driver
|
||||
|
||||
maintainers:
|
||||
- Rich Wiley
|
||||
|
||||
description: |
|
||||
the compatability = cache is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/mfd/nvidia-vrs-pseq.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_xmit_shortcut.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_ap.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_fsm_wnm.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_mlme_ext.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_sec_cam.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_xmit.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_sta_mgt.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_wow.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_recv_shortcut.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_wnm.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_recv.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/rtw_mlme.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/core/mesh/rtw_mesh.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/rtw_xmit_shortcut.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/rtw_recv.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/drv_types.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/ieee80211.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/rtw_mlme_ext.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/rtw_wnm.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/rtw_mlme.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/rtw_sec_cam.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/rtw_xmit.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/include/sta_info.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_rx_agg.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/pltfm_ops_windows.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_types.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_trx_def.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_tx.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_config.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/pltfm_ops_linux.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_rx.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/pltfm_ops_none.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/pltfm_ops_macos.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_api_drv.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/pltfm_ops_uefi.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_init.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/phl_def.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/hci/phl_trx_def_pcie.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/hci/phl_trx_pcie.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/test/trx_test.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/test/trx_test.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/hal_g6/rtl8852c/hal_trx_8852c.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/hal_g6/rtl8852c/pci/hal_trx_8852ce.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/hal_g6/mac/mac_def.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/hal_g6/mac/mac_exp_def.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/phl/hal_g6/mac/mac_ax/wowlan.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/os_dep/linux/rtw_cfg.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/os_dep/linux/ioctl_cfg80211.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/os_dep/linux/rtw_proc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/os_dep/linux/rtw_cfgvendor.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/os_dep/linux/rhashtable.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/os_dep/linux/pci_intf.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/platform/platform_mips_98d_pci.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/platform/platform_ops.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8852ce/platform/platform_linux_pc_pci.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_wlan_util.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_ap.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_mlme_ext.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_pwrctrl.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_sta_mgt.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_debug.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_wnm.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_recv.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/rtw_mlme.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/core/mesh/rtw_mesh.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/hal_com_h2c.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/rtw_recv.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/drv_types.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/hal_com.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/ieee80211.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/rtw_debug.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/rtw_mlme_ext.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/rtw_wnm.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/rtw_mlme.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/rtw_pwrctrl.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/include/rtw_xmit.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/os_dep/linux/rtw_proc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/os_dep/linux/rtw_cfgvendor.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/os_dep/linux/rhashtable.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/os_dep/linux/pci_intf.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/os_dep/linux/os_intfs.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/hal/hal_com.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/hal/hal_halmac.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/wireless/realtek/rtl8822ce/hal/rtl8822c/pci/rtl8822ce_xmit.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/ethernet/mft/mst_backward_compatibility/mst_pci/mst_pci_bc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/block/tegra_virt_storage/tegra_hv_vblk.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/block/tegra_virt_storage/tegra_hv_scsi.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/firmware/tegra/ivc_ext.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_imx274.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/lt6911uxc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_imx390_archived.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_imx318.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_imx185.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/pca9570.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_hawk_owl.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/max9295.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_ar0234.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_imx477.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/max929x.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_imx390.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/max9296.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/max96712.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/i2c/nv_imx219.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/camera/fusa-capture/capture-isp.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/media/platform/tegra/camera/fusa-capture/capture-common.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/i2c/busses/i2c-nvvrs11.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/bluetooth/realtek/rtk_misc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/bluetooth/realtek/rtk_bt.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/bluetooth/realtek/rtk_coex.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/rtc/rtc-max77851.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/virt/tegra/tegra_hv.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/plane.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/nvjpg.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/nvdec.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/nvenc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/gem.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/drm.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/vic.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/drm/tegra/include/uapi/drm/tegra_drm_next.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x/syncpt.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x/cdma.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x/bus.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x/dev.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x/dev.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x/include/linux/host1x-next.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x/hw/syncpt_hw.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x-emu/syncpt.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/gpu/host1x-emu/hw/syncpt_hw.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/host/nvdla/dla_os_interface.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/host/pva/pva_vpu_exe.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/host/pva/fw_include/pva-task.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/host/pva/fw_include/pva-ucode-header.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_fault.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_alloc.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_alloc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_dev_int.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_cache.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_ioctl.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_heap.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_handle.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_pp.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_dmabuf.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_alloc_int.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/nvmap/nvmap_dev.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/tsec/tsec_boot.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/tsec/tsec_linux.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/tsec/tsec_cmds.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/tsec/tsec_comms/tsec_comms.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/video/tegra/virt/tegra_gr_comm.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/dce/dce-debug-perf.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/dce/include/interface/dce-admin-perf-stats.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/dce/include/interface/dce-interface.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/uncore_pmu/tegra23x_perf_uncore.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/aon/tegra-ivc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/aon/tegra-aon-mail.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/mce/mce.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/mce/tegra23x-mce.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/rtcpu/tegra-rtcpu-trace.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/rtcpu/camchar.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/nvadsp/dev-t18x.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/nvscic2c-pcie/stream-extensions.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/nvscic2c-pcie/iova-alloc.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/nvscic2c-pcie/pci-client.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/nvscic2c-pcie/iova-alloc.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_clock.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_krnl.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_internal.h
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_mem.c
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_pci.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /cpus/l2-cache-0
|
||||
- /cpus/l2-cache-1
|
||||
- /cpus/l2-cache-2
|
||||
- /cpus/l2-cache-3
|
||||
- /cpus/l2-cache-4
|
||||
- /cpus/l2-cache-5
|
||||
- /cpus/l2-cache-6
|
||||
- /cpus/l2-cache-7
|
||||
- /cpus/l2-cache-8
|
||||
- /cpus/l2-cache-9
|
||||
- /cpus/l2-cache-10
|
||||
- /cpus/l2-cache-11
|
||||
- /cpus/l2-cache-12
|
||||
- /cpus/l2-cache-13
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- cache
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
cache-level:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
cache-size:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x100000
|
||||
maximum: 0x100000
|
||||
|
||||
cache-line-size:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40
|
||||
maximum: 0x40
|
||||
|
||||
cache-sets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x800
|
||||
maximum: 0x800
|
||||
|
||||
cache-unified:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
l2-cache-0 {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-size = <1048576>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <2048>;
|
||||
cache-unified;
|
||||
};
|
||||
@@ -1,101 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/vrs@3c/nvidia,vrs-pseq.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Voltage Regulator Spec Power Sequencer Multi Function Device Core Driver
|
||||
|
||||
maintainers:
|
||||
- Subhi Garg
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,vrs-pseq is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/mfd/nvidia-vrs-pseq.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bpmp/i2c/vrs@3c
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,vrs-pseq
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3c
|
||||
maximum: 0x3c
|
||||
|
||||
interrupt-parent:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
|
||||
interrupt-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
'#interrupt-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
vrs@3c {
|
||||
compatible = "nvidia,vrs-pseq";
|
||||
reg = <0x3c>;
|
||||
interrupt-parent = <&pmc>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,71 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pmu/arm,armv8-pmuv3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Tegra Power Management Unit Module
|
||||
|
||||
maintainers:
|
||||
- Besar Wicaksono
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /pmu
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- arm,armv8-pmuv3
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
pmu {
|
||||
compatible = "arm,armv8-pmuv3";
|
||||
status = "disabled";
|
||||
interrupts = <GIC_PPI 7 8>;
|
||||
};
|
||||
@@ -1,101 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/funnel_major@10080000/arm,coresight-dynamic-funnel.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Coresight Dynamic Funnel Driver
|
||||
|
||||
maintainers:
|
||||
- Rich Wiley
|
||||
|
||||
description: |
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /funnel_major@10080000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- arm,coresight-dynamic-funnel
|
||||
- arm,primecell
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10080000
|
||||
maximum: 0x10080000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x1000
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xcb
|
||||
maximum: 0xcb
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- apb_pclk
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
funnel_major@10080000 {
|
||||
compatible = "arm,coresight-dynamic-funnel, arm,primecell";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x10080000 0x0 0x1000>;
|
||||
clocks = <&bpmp TEGRA264_CLK_HCSITE>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
@@ -1,100 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/replicator_soc@10060000/arm,coresight-dynamic-replicator.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Coresight Dynamic Replicator Driver
|
||||
|
||||
maintainers:
|
||||
- Rich Wiley
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /replicator_soc@10060000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- arm,coresight-dynamic-replicator
|
||||
- arm,primecell
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10060000
|
||||
maximum: 0x10060000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x1000
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xcb
|
||||
maximum: 0xcb
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- apb_pclk
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
replicator_soc@10060000 {
|
||||
compatible = "arm,coresight-dynamic-replicator, arm,primecell";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x10060000 0x0 0x1000>;
|
||||
clocks = <&bpmp TEGRA264_CLK_HCSITE>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
@@ -1,110 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/stm@10070000/arm,coresight-stm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Coresight STM Driver
|
||||
|
||||
maintainers:
|
||||
- Rich Wiley
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /stm@10070000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- arm,coresight-stm
|
||||
- arm,primecell
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10070000
|
||||
maximum: 0x11000000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x1000000
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- stm-base
|
||||
- stm-stimulus-base
|
||||
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xca
|
||||
maximum: 0xca
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- apb_pclk
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
stm@10070000 {
|
||||
compatible = "arm,coresight-stm, arm,primecell";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x10070000 0x0 0x1000>,
|
||||
<0x0 0x11000000 0x0 0x1000000>;
|
||||
reg-names = "stm-base, stm-stimulus-base";
|
||||
clocks = <&bpmp TEGRA264_CLK_CSITE>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
@@ -1,121 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/etf_soc@10040000/arm,coresight-tmc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Coresight TMC Driver
|
||||
|
||||
maintainers:
|
||||
- Rich Wiley
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /etf_soc@10040000
|
||||
- /etr_soc@10050000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- arm,coresight-tmc
|
||||
- arm,primecell
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10040000
|
||||
maximum: 0x10050000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x1000
|
||||
|
||||
coresight-default-sink:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xcb
|
||||
maximum: 0xcb
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- apb_pclk
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x300
|
||||
maximum: 0x300
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
etf_soc@10040000 {
|
||||
compatible = "arm,coresight-tmc, arm,primecell";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x10040000 0x0 0x1000>;
|
||||
coresight-default-sink;
|
||||
clocks = <&bpmp TEGRA264_CLK_HCSITE>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
@@ -1,187 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mods_pcie0/nvidia,mods_smmu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MOD's SMMU Driver
|
||||
|
||||
maintainers:
|
||||
- Kiran Kasamsetty
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,mods_smmu is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_smmu_drv.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /mods_pcie0
|
||||
- /mods_pcie1
|
||||
- /mods_pcie2
|
||||
- /mods_pcie3
|
||||
- /mods_pcie4
|
||||
- /mods_pcie5
|
||||
- /mods_isp0
|
||||
- /mods_isp2
|
||||
- /mods_i2c0
|
||||
- /mods_i2c1
|
||||
- /mods_i2c2
|
||||
- /mods_i2c3
|
||||
- /mods_i2c7
|
||||
- /mods_i2c9
|
||||
- /mods_i2c11
|
||||
- /mods_i2c12
|
||||
- /mods_i2c14
|
||||
- /mods_i2c15
|
||||
- /mods_i2c16
|
||||
- /mods_spi1
|
||||
- /mods_spi2
|
||||
- /mods_spi3
|
||||
- /mods_spi4
|
||||
- /mods_spi5
|
||||
- /mods_uart4
|
||||
- /mods_uart5
|
||||
- /mods_uart9
|
||||
- /mods_uart10
|
||||
- /mods_vi0
|
||||
- /mods_vi1
|
||||
- /mods_sdmmc1
|
||||
- /mods_ufs
|
||||
- /mods_xhci
|
||||
- /mods_xusb
|
||||
- /mods_dma
|
||||
- /mods_se
|
||||
- /mods_seu1
|
||||
- /mods_seu2
|
||||
- /mods_seu3
|
||||
- /mods_qspi0_dma
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,mods_smmu
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
iommu-map:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x50000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
dev-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- mods_pcie0
|
||||
- mods_pcie1
|
||||
- mods_pcie2
|
||||
- mods_pcie3
|
||||
- mods_pcie4
|
||||
- mods_pcie5
|
||||
- mods_isp0
|
||||
- mods_isp2
|
||||
- mods_i2c0
|
||||
- mods_i2c1
|
||||
- mods_i2c2
|
||||
- mods_i2c3
|
||||
- mods_i2c7
|
||||
- mods_i2c9
|
||||
- mods_i2c11
|
||||
- mods_i2c12
|
||||
- mods_i2c14
|
||||
- mods_i2c15
|
||||
- mods_i2c16
|
||||
- mods_spi1
|
||||
- mods_spi2
|
||||
- mods_spi3
|
||||
- mods_spi4
|
||||
- mods_spi5
|
||||
- mods_uart4
|
||||
- mods_uart5
|
||||
- mods_uart9
|
||||
- mods_uart10
|
||||
- mods_vi0
|
||||
- mods_vi1
|
||||
- mods_sdmmc1
|
||||
- mods_ufs
|
||||
- mods_xhci
|
||||
- mods_xusb
|
||||
- mods_dma
|
||||
- mods_se
|
||||
- mods_seu1
|
||||
- mods_seu2
|
||||
- mods_seu3
|
||||
- mods_qspi0_dma
|
||||
|
||||
|
||||
nvidia,bpmp:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x5
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x800
|
||||
maximum: 0x50000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
mods_pcie0 {
|
||||
compatible = "nvidia,mods_smmu";
|
||||
iommu-map = <0x0 &smmu2_mmu 0x10000 0x10000>;
|
||||
dma-coherent;
|
||||
dev-names = "mods_pcie0";
|
||||
status = "disabled";
|
||||
nvidia,bpmp = <&bpmp 0x0>;
|
||||
};
|
||||
@@ -1,133 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mods_tegra_dma/nvidia,mods_tegra_dma.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MOD's DMA Driver
|
||||
|
||||
maintainers:
|
||||
- Kiran Kasamsetty
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,mods_tegra_dma is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_dma.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /mods_tegra_dma
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,mods_tegra_dma
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
dmas:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x14
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1f
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x801
|
||||
maximum: 0x81f
|
||||
|
||||
dma-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- i2c0_tx
|
||||
- i2c1_tx
|
||||
- i2c2_tx
|
||||
- i2c3_tx
|
||||
- i2c7_tx
|
||||
- i2c9_tx
|
||||
- i2c11_tx
|
||||
- i2c12_tx
|
||||
- i2c14_tx
|
||||
- i2c15_tx
|
||||
- i2c16_tx
|
||||
- spi1_rx
|
||||
- spi1_tx
|
||||
- spi2_rx
|
||||
- spi2_tx
|
||||
- spi3_rx
|
||||
- spi3_tx
|
||||
- spi4_rx
|
||||
- spi4_tx
|
||||
- spi5_rx
|
||||
- spi5_tx
|
||||
- uart4_rx
|
||||
- uart4_tx
|
||||
- uart5_rx
|
||||
- uart5_tx
|
||||
- uart9_rx
|
||||
- uart9_tx
|
||||
- uart10_rx
|
||||
- uart10_tx
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
mods_tegra_dma {
|
||||
compatible = "nvidia,mods_tegra_dma";
|
||||
dmas = <&gpcdma 0 31 TEGRA264_GPCDMA_SID_I2C0>,
|
||||
< &gpcdma 7 7 TEGRA264_GPCDMA_SID_I2C1>,
|
||||
< &gpcdma 3 3 TEGRA264_GPCDMA_SID_I2C2>,
|
||||
< &gpcdma 4 4 TEGRA264_GPCDMA_SID_I2C3>,
|
||||
< &gpcdma 6 6 TEGRA264_GPCDMA_SID_I2C7>,
|
||||
< &gpcdma 2 2 TEGRA264_GPCDMA_SID_I2C9>,
|
||||
< &gpcdma 1 1 TEGRA264_GPCDMA_SID_I2C11>,
|
||||
< &gpcdma 5 5 TEGRA264_GPCDMA_SID_I2C12>,
|
||||
< &gpcdma 18 28 TEGRA264_GPCDMA_SID_I2C14>,
|
||||
< &gpcdma 19 29 TEGRA264_GPCDMA_SID_I2C15>,
|
||||
< &gpcdma 20 30 TEGRA264_GPCDMA_SID_I2C16>,
|
||||
< &gpcdma 9 9 TEGRA264_GPCDMA_SID_SPI1>,
|
||||
< &gpcdma 9 19 TEGRA264_GPCDMA_SID_SPI1>,
|
||||
< &gpcdma 8 8 TEGRA264_GPCDMA_SID_SPI2>,
|
||||
< &gpcdma 8 18 TEGRA264_GPCDMA_SID_SPI2>,
|
||||
< &gpcdma 14 14 TEGRA264_GPCDMA_SID_SPI3>,
|
||||
< &gpcdma 14 24 TEGRA264_GPCDMA_SID_SPI3>,
|
||||
< &gpcdma 15 15 TEGRA264_GPCDMA_SID_SPI4>,
|
||||
< &gpcdma 15 25 TEGRA264_GPCDMA_SID_SPI4>,
|
||||
< &gpcdma 16 16 TEGRA264_GPCDMA_SID_SPI5>,
|
||||
< &gpcdma 16 26 TEGRA264_GPCDMA_SID_SPI5>,
|
||||
< &gpcdma 13 23 TEGRA264_GPCDMA_SID_UART4>,
|
||||
< &gpcdma 13 13 TEGRA264_GPCDMA_SID_UART4>,
|
||||
< &gpcdma 11 11 TEGRA264_GPCDMA_SID_UART5>,
|
||||
< &gpcdma 11 21 TEGRA264_GPCDMA_SID_UART5>,
|
||||
< &gpcdma 10 10 TEGRA264_GPCDMA_SID_UART9>,
|
||||
< &gpcdma 10 20 TEGRA264_GPCDMA_SID_UART9>,
|
||||
< &gpcdma 12 12 TEGRA264_GPCDMA_SID_UART10>,
|
||||
< &gpcdma 12 22 TEGRA264_GPCDMA_SID_UART10>;
|
||||
dma-names = "i2c0_tx, i2c1_tx, i2c2_tx, i2c3_tx, i2c7_tx, i2c9_tx, i2c11_tx, i2c12_tx, i2c14_tx, i2c15_tx, i2c16_tx, spi1_rx, spi1_tx, spi2_rx, spi2_tx, spi3_rx, spi3_tx, spi4_rx, spi4_tx, spi5_rx, spi5_tx, uart4_rx, uart4_tx, uart5_rx, uart5_tx, uart9_rx, uart9_tx, uart10_rx, uart10_tx";
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,51 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mods_test/nvidia,mods_test.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MOD's Test Driver
|
||||
|
||||
maintainers:
|
||||
- Kiran Kasamsetty
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,mods_test is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_dmabuf.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /mods_test
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,mods_test
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
mods_test {
|
||||
compatible = "nvidia,mods_test";
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,72 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bus@0/simple-bus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Mods Simple Bus Driver
|
||||
|
||||
maintainers:
|
||||
- Chris Dragan
|
||||
- Kiran Kasamsetty
|
||||
|
||||
description: |
|
||||
the compatability = simple-bus is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/mods/mods_clock.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0
|
||||
- /mods-simple-bus
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- simple-bus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
'#address-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x2
|
||||
|
||||
'#size-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x2
|
||||
|
||||
device_type:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- mods-simple-bus
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
bus@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
|
||||
};
|
||||
@@ -1,67 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra-isp-map/nvidia,csi-isp-map-config.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra CSI-ISP Map Config
|
||||
|
||||
maintainers:
|
||||
- Chinniah Poosapadi
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /tegra-isp-map
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,csi-isp-map-config
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,isp-mapping:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x5
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra-isp-map {
|
||||
compatible = "nvidia,csi-isp-map-config";
|
||||
nvidia,isp-mapping = <0 0>,
|
||||
<1 0>,
|
||||
<2 1>,
|
||||
<3 1>,
|
||||
<4 0>,
|
||||
<5 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,123 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bootmgr/nvidia,dulink-connection.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Drive Update Connection Driver
|
||||
|
||||
maintainers:
|
||||
- Johnny Fan
|
||||
|
||||
description: |
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /chosen/driveupdate/bootmgr
|
||||
- /chosen/driveupdate/bhc
|
||||
- /chosen/driveupdate/decomp
|
||||
- /chosen/driveupdate/du-client
|
||||
- /chosen/driveupdate/content
|
||||
- /chosen/driveupdate/master
|
||||
- /chosen/driveupdate/tii
|
||||
- /chosen/driveupdate/ctx_store
|
||||
- /chosen/driveupdate/auth
|
||||
- /chosen/driveupdate/dushell
|
||||
- /chosen/driveupdate/plugin
|
||||
- /chosen/driveupdate/ddu
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,dulink-connection
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
remote-path:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- /bootmgr
|
||||
- /bhc
|
||||
- /decomp
|
||||
- /du-client
|
||||
- /content
|
||||
- /master
|
||||
- /tii
|
||||
- /ctx_store
|
||||
- /auth
|
||||
- /dushell
|
||||
- /plugin
|
||||
- /ddu
|
||||
|
||||
|
||||
type:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- DOWNLINK
|
||||
|
||||
|
||||
tr-type:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- NVSCI
|
||||
- TCP
|
||||
|
||||
|
||||
tr-params:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- nvdu_gos_ipc_a_0
|
||||
- nvdu_gos_ipc_a_1
|
||||
- nvdu_gos_ipc_b_0
|
||||
- nvdu_gos_ipc_b_1
|
||||
- nvdu_gos_ipc_c_0
|
||||
- nvdu_gos_ipc_c_1
|
||||
- nvdu_gos_ipc_d_0
|
||||
- nvdu_gos_ipc_d_1
|
||||
- nvdu_gos_ipc_e_0
|
||||
- nvdu_gos_ipc_e_1
|
||||
- nvdu_gos_ipc_l_0
|
||||
- nvdu_gos_ipc_l_1
|
||||
- nvdu_gos_ipc_j_0
|
||||
- nvdu_gos_ipc_j_1
|
||||
- nvdu_gos_ipc_k_0
|
||||
- nvdu_gos_ipc_k_1
|
||||
- nvdu_gos_ipc_m_0
|
||||
- nvdu_gos_ipc_m_1
|
||||
- nvdu_gos_ipc_f_0
|
||||
- nvdu_gos_ipc_f_1
|
||||
- nvdu_gos_ipc_g_0
|
||||
- nvdu_gos_ipc_g_1
|
||||
- TCP_SERVER
|
||||
- 0.0.0.0
|
||||
- 4455
|
||||
- 0
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
bootmgr {
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,65 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/smmu_test/nvidia,smmu_test.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia SMMU Test
|
||||
|
||||
maintainers:
|
||||
- Sachin Nikam
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /smmu_test
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,smmu_test
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
smmu_test {
|
||||
compatible = "nvidia,smmu_test";
|
||||
iommus = <&smmu4_mmu 0x00000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,226 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra_soc_hwpm@1604000/nvidia,t264-soc-hwpm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra SOC-HWPM
|
||||
|
||||
maintainers:
|
||||
- Besar Wicaksono
|
||||
- Vasuki Shankar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/tegra_soc_hwpm@1604000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,t264-soc-hwpm
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xa8
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1600000
|
||||
maximum: 0x8160f000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x2000
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc
|
||||
maximum: 0xcd
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- la
|
||||
- parent
|
||||
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xa
|
||||
maximum: 0x14
|
||||
|
||||
reset-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- la
|
||||
- hwpm
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xe00
|
||||
maximum: 0xe00
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra_soc_hwpm@1604000 {
|
||||
compatible = "nvidia,t264-soc-hwpm";
|
||||
dma-coherent;
|
||||
reg = <0x00 0x01600000 0x0 0x1000>,
|
||||
<0x00 0x01604000 0x0 0x1000>,
|
||||
<0x00 0x14100000 0x0 0x1000>,
|
||||
<0x00 0x14110000 0x0 0x1000>,
|
||||
<0x00 0x14120000 0x0 0x1000>,
|
||||
<0x00 0x14130000 0x0 0x1000>,
|
||||
<0x00 0x14140000 0x0 0x1000>,
|
||||
<0x00 0x14150000 0x0 0x1000>,
|
||||
<0x00 0x14160000 0x0 0x1000>,
|
||||
<0x00 0x14170000 0x0 0x1000>,
|
||||
<0x00 0x14180000 0x0 0x1000>,
|
||||
<0x00 0x14190000 0x0 0x1000>,
|
||||
<0x00 0x141a0000 0x0 0x1000>,
|
||||
<0x00 0x141b0000 0x0 0x1000>,
|
||||
<0x00 0x141c0000 0x0 0x1000>,
|
||||
<0x00 0x141d0000 0x0 0x1000>,
|
||||
<0x81 0x01600000 0x0 0x1000>,
|
||||
<0x81 0x01601000 0x0 0x1000>,
|
||||
<0x81 0x01602000 0x0 0x1000>,
|
||||
<0x81 0x01603000 0x0 0x1000>,
|
||||
<0x81 0x01604000 0x0 0x1000>,
|
||||
<0x81 0x01605000 0x0 0x1000>,
|
||||
<0x81 0x01606000 0x0 0x1000>,
|
||||
<0x81 0x01607000 0x0 0x1000>,
|
||||
<0x81 0x01608000 0x0 0x1000>,
|
||||
<0x81 0x01609000 0x0 0x1000>,
|
||||
<0x81 0x0160a000 0x0 0x1000>,
|
||||
<0x81 0x0160b000 0x0 0x1000>,
|
||||
<0x81 0x0160c000 0x0 0x1000>,
|
||||
<0x81 0x0160d000 0x0 0x1000>,
|
||||
<0x81 0x0160e000 0x0 0x1000>,
|
||||
<0x81 0x0160f000 0x0 0x1000>,
|
||||
<0x81 0x01621000 0x0 0x1000>,
|
||||
<0x81 0x01622000 0x0 0x1000>,
|
||||
<0x81 0x01623000 0x0 0x1000>,
|
||||
<0x81 0x01624000 0x0 0x1000>,
|
||||
<0x81 0x01625000 0x0 0x1000>,
|
||||
<0x81 0x01626000 0x0 0x1000>,
|
||||
<0x81 0x01627000 0x0 0x1000>,
|
||||
<0x81 0x01628000 0x0 0x1000>,
|
||||
<0x81 0x01629000 0x0 0x1000>,
|
||||
<0x81 0x0162a000 0x0 0x1000>,
|
||||
<0x81 0x0162b000 0x0 0x1000>,
|
||||
<0x81 0x0162c000 0x0 0x1000>,
|
||||
<0x81 0x0162d000 0x0 0x1000>,
|
||||
<0x81 0x0162e000 0x0 0x1000>,
|
||||
<0x81 0x0162f000 0x0 0x1000>,
|
||||
<0x81 0x01630000 0x0 0x1000>,
|
||||
<0x81 0x01631000 0x0 0x1000>,
|
||||
<0x81 0x01632000 0x0 0x1000>,
|
||||
<0x81 0x0163e000 0x0 0x1000>,
|
||||
<0x81 0x0163f000 0x0 0x1000>,
|
||||
<0x81 0x01642000 0x0 0x1000>,
|
||||
<0x81 0x01643000 0x0 0x1000>,
|
||||
<0x81 0x01644000 0x0 0x1000>,
|
||||
<0x81 0x01645000 0x0 0x1000>,
|
||||
<0x81 0x01646000 0x0 0x1000>,
|
||||
<0x81 0x01647000 0x0 0x1000>,
|
||||
<0x81 0x0164b000 0x0 0x1000>,
|
||||
<0x81 0x0164f000 0x0 0x1000>,
|
||||
<0x81 0x01653000 0x0 0x1000>,
|
||||
<0x81 0x81604000 0x0 0x1000>,
|
||||
<0x81 0x81605000 0x0 0x1000>,
|
||||
<0x81 0x81606000 0x0 0x1000>,
|
||||
<0x81 0x81607000 0x0 0x1000>,
|
||||
<0x81 0x8160b000 0x0 0x1000>,
|
||||
<0x81 0x8160c000 0x0 0x1000>,
|
||||
<0x81 0x8160e000 0x0 0x1000>,
|
||||
<0x81 0x8160f000 0x0 0x1000>,
|
||||
<0x88 0x01601000 0x0 0x1000>,
|
||||
<0x88 0x01602000 0x0 0x1000>,
|
||||
<0xa8 0x01604000 0x0 0x1000>,
|
||||
<0xa8 0x01628000 0x0 0x1000>,
|
||||
<0xa8 0x01629000 0x0 0x1000>,
|
||||
<0x00 0x01610000 0x0 0x2000>,
|
||||
<0x00 0x01612000 0x0 0x1000>;
|
||||
clocks = <&bpmp TEGRA264_CLK_LA>,
|
||||
<&bpmp TEGRA264_CLK_SPLL_OUT7>;
|
||||
clock-names = "la, parent";
|
||||
resets = <&bpmp TEGRA264_RESET_LA>,
|
||||
<&bpmp TEGRA264_RESET_HWPM>;
|
||||
reset-names = "la, hwpm";
|
||||
iommus = <&smmu1_mmu TEGRA_SID_PMA0>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,76 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/SS_ErrorReportingConfig/nvidia,tegra-SafetyServiceConfig.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Safety Service Configuration
|
||||
|
||||
maintainers:
|
||||
- Rahul Bedarkar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /SS_ErrorReportingConfig
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-SafetyServiceConfig
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
Sw_Errors_count:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
Sw_Errors:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x30
|
||||
maximum: 0x8120
|
||||
|
||||
TSC_MON_Enable:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
TSC_MON_Drift_Threshold:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x64
|
||||
maximum: 0x64
|
||||
|
||||
TSC_MON_Debounce_Delay:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1388
|
||||
maximum: 0x1388
|
||||
|
||||
TSC_MON_Sync_Timeout:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2710
|
||||
maximum: 0x2710
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
SS_ErrorReportingConfig {
|
||||
};
|
||||
@@ -1,61 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bpmp-dummy/nvidia,tegra-bpmp-dummy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia BPMP Dummy Node
|
||||
|
||||
maintainers:
|
||||
- Venkat Reddy Talla
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bpmp-dummy
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-bpmp-dummy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
'#clock-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#reset-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#power-domain-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
bpmp-dummy {
|
||||
};
|
||||
@@ -1,51 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/FsiComAppChConfCcplexApp/nvidia,tegra-fsicom-CcplexApp.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: FSI Communication Application Configuration
|
||||
|
||||
maintainers:
|
||||
- Rahul Bedarkar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /FsiComAppChConfCcplexApp
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-fsicom-CcplexApp
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
channelid_list:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
FsiComAppChConfCcplexApp {
|
||||
};
|
||||
@@ -1,54 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/FsiComClientChConfigEpd/nvidia,tegra-fsicom-EPD.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: FSU Communication Client Configuration
|
||||
|
||||
maintainers:
|
||||
- Rahul Bedarkar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /FsiComClientChConfigEpd
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-fsicom-EPD
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
channelid_list:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
FsiComClientChConfigEpd {
|
||||
compatible = "nvidia,tegra-fsicom-EPD";
|
||||
status = "disabled";
|
||||
channelid_list = <0>;
|
||||
};
|
||||
@@ -1,72 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/FsiComIvc/nvidia,tegra-fsicom-channels.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: FSI Communication IVC Node
|
||||
|
||||
maintainers:
|
||||
- Rahul Bedarkar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /FsiComIvc
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-fsicom-channels
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nChannel:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x9
|
||||
maximum: 0x9
|
||||
|
||||
nvsciipc_endpoint:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- nvfsicom_EPD
|
||||
- nvfsicom_CcplexApp
|
||||
- nvfsicom_CcplexApp_state_change
|
||||
- nvfsicom_app1
|
||||
- nvfsicom_app2
|
||||
- nvfsicom_appGR
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
FsiComIvc {
|
||||
compatible = "nvidia,tegra-fsicom-channels";
|
||||
status = "disabled";
|
||||
nChannel = <9>;
|
||||
nvsciipc_endpoint = "nvfsicom_EPD",
|
||||
"nvfsicom_CcplexApp",
|
||||
"nvfsicom_CcplexApp_state_change",
|
||||
"nvfsicom_app1",
|
||||
"nvfsicom_app2",
|
||||
"nvfsicom_appGR";
|
||||
};
|
||||
@@ -1,53 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/FsiComAppChConfApp1/nvidia,tegra-fsicom-sampleApp1.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: FSI Application IVC Channel Configuration
|
||||
|
||||
maintainers:
|
||||
- Rahul Bedarkar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /FsiComAppChConfApp1
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-fsicom-sampleApp1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
channelid_list:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
FsiComAppChConfApp1 {
|
||||
compatible = "nvidia,tegra-fsicom-sampleApp1";
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,51 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/FsiComQnxAppChConfAppGR/nvidia,tegra-fsicom-sampleAppGR.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: QNX FSI Communication Application Configuration
|
||||
|
||||
maintainers:
|
||||
- Rahul Bedarkar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /FsiComQnxAppChConfAppGR
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-fsicom-sampleAppGR
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
channelid_list:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5
|
||||
maximum: 0x5
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
FsiComQnxAppChConfAppGR {
|
||||
};
|
||||
@@ -1,82 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/hsp-mbox/nvidia,tegra186-hsp-mailbox.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hypervisor Hardware Syncronization Primatives (HSP) Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/pva0@818c000000/hsp/hsp-mbox
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra186-hsp-mailbox
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,hsp-shared-mailbox:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x7
|
||||
|
||||
nvidia,hsp-shared-mailbox-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- command
|
||||
- addr
|
||||
- len
|
||||
- args
|
||||
- sidechannel-wr
|
||||
- aisr
|
||||
- sidechannel-rd
|
||||
- isr
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
hsp-mbox {
|
||||
compatible = "nvidia,tegra186-hsp-mailbox";
|
||||
nvidia,hsp-shared-mailbox = <&hsp_pva0 0x0>,
|
||||
<&hsp_pva0 0x1>,
|
||||
<&hsp_pva0 0x2>,
|
||||
<&hsp_pva0 0x3>,
|
||||
<&hsp_pva0 0x4>,
|
||||
<&hsp_pva0 0x5>,
|
||||
<&hsp_pva0 0x6>,
|
||||
<&hsp_pva0 0x7>;
|
||||
nvidia,hsp-shared-mailbox-names = "command, addr, len, args, sidechannel-wr, aisr, sidechannel-rd, isr";
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,47 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/hsp/nvidia,tegra194-pva0-hsp.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Progrmable Vision Accelerator (PVA) Hypervisor Hardware Syncronization Primatives (HSP)
|
||||
|
||||
maintainers:
|
||||
- Omar Nemri
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/pva0@818c000000/hsp
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra194-pva0-hsp
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
hsp {
|
||||
compatible = "nvidia,tegra194-pva0-hsp";
|
||||
};
|
||||
@@ -1,92 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/aconnect@9000000/nvidia,tegra264-aconnect.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Always Connected Driver
|
||||
|
||||
maintainers:
|
||||
- Mohan Kumar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/aconnect@9000000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-aconnect
|
||||
- nvidia,tegra210-aconnect
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x9c
|
||||
maximum: 0xa4
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- ape
|
||||
- apb2ape
|
||||
|
||||
|
||||
'#address-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
'#size-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
aconnect@9000000 {
|
||||
compatible = "nvidia,tegra264-aconnect",
|
||||
"nvidia,tegra210-aconnect";
|
||||
clocks = <&bpmp TEGRA264_CLK_APE>,
|
||||
<&bpmp TEGRA264_CLK_ADSP>;
|
||||
clock-names = "ape, apb2ape";
|
||||
power-domains = <&bpmp TEGRA264_POWER_DOMAIN_AUD>;
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x0 0x9000000 0x0 0x9000000 0x0 0x2000000>;
|
||||
};
|
||||
@@ -1,71 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/adsp_audio/nvidia,tegra264-adsp-audio-hv.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Hypervisor Audio Driver
|
||||
|
||||
maintainers:
|
||||
- Mohan Kumar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/aconnect@9000000/adsp_audio
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-adsp-audio-hv
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,adma_ch_page:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
|
||||
nvidia,adma_ch_start:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x31
|
||||
maximum: 0x31
|
||||
|
||||
nvidia,adma_ch_cnt:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
|
||||
compr-ops:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
num-plugin:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
adsp_audio {
|
||||
};
|
||||
@@ -1,137 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller@9960000/nvidia,tegra264-agic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia T264 Interrupt Controller
|
||||
|
||||
maintainers:
|
||||
- Mohan Kumar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/aconnect@9000000/interrupt-controller@9960000
|
||||
- /bus@0/aconnect@9000000/interrupt-controller@9970000
|
||||
- /bus@0/aconnect@9000000/interrupt-controller@9980000
|
||||
- /bus@0/aconnect@9000000/interrupt-controller@9990000
|
||||
- /bus@0/aconnect@9000000/interrupt-controller@99a0000
|
||||
- /bus@0/aconnect@9000000/interrupt-controller@99b0000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-agic
|
||||
- nvidia,tegra210-agic
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
'#interrupt-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
|
||||
interrupt-controller:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x9961000
|
||||
maximum: 0x99b2000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x1000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xf04
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xf04
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x9c
|
||||
maximum: 0x9c
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- clk
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
interrupt-controller@9960000 {
|
||||
compatible = "nvidia,tegra264-agic",
|
||||
"nvidia,tegra210-agic";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
reg = <0x0 0x9961000 0x0 0x1000>,
|
||||
<0x0 0x9962000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 0x230(GIC_CPU_MASK_SIMPLE(4)|IRQ_TYPE_LEVEL_HIGH)>;
|
||||
clocks = <&bpmp TEGRA264_CLK_ADSP>;
|
||||
clock-names = "clk";
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,102 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra264-audio-graph-card.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia T264 Audio Graph Card Driver
|
||||
|
||||
maintainers:
|
||||
- Mohan Kumar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /sound
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-audio-graph-card
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,ahub-c2c-links:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x9e
|
||||
maximum: 0x9f
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- pll_a
|
||||
- plla_out0
|
||||
|
||||
|
||||
assigned-clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x9e
|
||||
maximum: 0x115
|
||||
|
||||
assigned-clock-parents:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x9f
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
nvidia,ahub-c2c-links;
|
||||
compatible = "nvidia,tegra264-audio-graph-card";
|
||||
clocks = <&bpmp TEGRA264_CLK_PLLA1>,
|
||||
<&bpmp TEGRA264_CLK_PLLA1_OUT1>;
|
||||
clock-names = "pll_a, plla_out0";
|
||||
assigned-clocks = <&bpmp TEGRA264_CLK_PLLA1>,
|
||||
<&bpmp TEGRA264_CLK_PLLA1_OUT1>,
|
||||
<&bpmp TEGRA264_CLK_AUD_MCLK>;
|
||||
assigned-clock-parents = <0>,
|
||||
<&bpmp TEGRA264_CLK_PLLA1>,
|
||||
<&bpmp TEGRA264_CLK_PLLA1_OUT1>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,73 +0,0 @@
|
||||
# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/i2c/nvidia,tegra264-bpmp-i2c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra T264 BPMP I2C Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bpmp/i2c
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-bpmp-i2c
|
||||
- nvidia,tegra186-bpmp-i2c
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,bpmp-bus-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5
|
||||
maximum: 0x5
|
||||
|
||||
multi-master:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
description: Enables retries if arbitration is lost. Currently, the
|
||||
functionality is supported only by the Tegra264 BPMP firmware.
|
||||
|
||||
'#address-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#size-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
compatible = "nvidia,tegra264-bpmp-i2c",
|
||||
"nvidia,tegra186-bpmp-i2c";
|
||||
status = "disabled";
|
||||
nvidia,bpmp-bus-id = <5>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
@@ -1,79 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bpmp-shmem@0/nvidia,tegra264-bpmp-shmem.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra T264 BPMP Shared Memory Driver
|
||||
|
||||
maintainers:
|
||||
- Sandipan Patra
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /reserved-memory/bpmp-shmem@0
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-bpmp-shmem
|
||||
- nvidia,tegra234-bpmp-shmem
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x86070000
|
||||
maximum: 0x86070000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2000
|
||||
maximum: 0x2000
|
||||
|
||||
no-map:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
bpmp-shmem@0 {
|
||||
compatible = "nvidia,tegra264-bpmp-shmem",
|
||||
"nvidia,tegra234-bpmp-shmem";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x86070000 0x0 0x2000>;
|
||||
no-map;
|
||||
};
|
||||
@@ -1,73 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/nvdisplay-niso/nvidia,tegra264-display-niso.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra Display Driver
|
||||
|
||||
maintainers:
|
||||
- Mihir Pradeep Garude
|
||||
|
||||
description: |
|
||||
The compatibility = nvidia,tegra264-display-niso is mentioned in the following drivers
|
||||
- For DisplayServer <TOP>/display/drivers/drivers/
|
||||
- For OpenRM <TOP>/gpu/drv/
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /display@8808c00000/nvdisplay-niso
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-display-niso
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x901
|
||||
maximum: 0x901
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
nvdisplay-niso {
|
||||
compatible = "nvidia,tegra264-display-niso";
|
||||
iommus = <&smmu3_mmu 0x901>;
|
||||
dma-coherent;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,543 +0,0 @@
|
||||
# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display@8808c00000/nvidia,tegra264-display.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra Display Driver
|
||||
|
||||
maintainers:
|
||||
- Mihir Pradeep Garude
|
||||
|
||||
description: |
|
||||
The compatibility = nvidia,tegra264-display is mentioned in the following drivers
|
||||
- For DisplayServer <TOP>/display/drivers/drivers/
|
||||
- For OpenRM <TOP>/gpu/drv/
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /display@8808c00000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-display
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
power-domains:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,num-dpaux-instance:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
nvidia,bpmp:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- nvdisplay
|
||||
- dpaux0
|
||||
- hdacodec
|
||||
- mipical
|
||||
- vdisp
|
||||
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x88
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8c00000
|
||||
maximum: 0x89840000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xfff
|
||||
maximum: 0x1fffff
|
||||
|
||||
interrupt-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- nvdisplay
|
||||
- dpaux0
|
||||
- dpaux1
|
||||
- dpaux2
|
||||
- dpaux3
|
||||
- hdacodec
|
||||
- vdisp
|
||||
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xf7
|
||||
maximum: 0x101
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1d3
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- nvdisplayhub_clk
|
||||
- nvdisplay_disp_clk
|
||||
- nvdisplay_p0_clk
|
||||
- nvdisplay_p1_clk
|
||||
- nvdisplay_p2_clk
|
||||
- nvdisplay_p3_clk
|
||||
- nvdisplay_p4_clk
|
||||
- nvdisplay_p5_clk
|
||||
- nvdisplay_p6_clk
|
||||
- nvdisplay_p7_clk
|
||||
- fuse_clk
|
||||
- sppll0_clkouta_clk
|
||||
- sppll0_clkoutb_clk
|
||||
- sppll0_clkoutpn_clk
|
||||
- sppll1_clkoutpn_clk
|
||||
- sppll0_div27_clk
|
||||
- sppll1_div27_clk
|
||||
- vpll0_clk
|
||||
- vpll1_clk
|
||||
- vpll2_clk
|
||||
- vpll3_clk
|
||||
- vpll4_clk
|
||||
- vpll5_clk
|
||||
- vpll6_clk
|
||||
- vpll7_clk
|
||||
- rg0_clk
|
||||
- rg1_clk
|
||||
- rg2_clk
|
||||
- rg3_clk
|
||||
- rg4_clk
|
||||
- rg5_clk
|
||||
- rg6_clk
|
||||
- rg7_clk
|
||||
- disppll_clk
|
||||
- pre_sor0_clk
|
||||
- pre_sor1_clk
|
||||
- pre_sor2_clk
|
||||
- pre_sor3_clk
|
||||
- dp_link_ref_clk
|
||||
- dp_linkb_ref_clk
|
||||
- dp_linkc_ref_clk
|
||||
- dp_linkd_ref_clk
|
||||
- sor_linka_input_clk
|
||||
- sor_linkb_input_clk
|
||||
- sor_linkc_input_clk
|
||||
- sor_linkd_input_clk
|
||||
- sor_linka_afifo_clk
|
||||
- sor_linkb_afifo_clk
|
||||
- sor_linkc_afifo_clk
|
||||
- sor_linkd_afifo_clk
|
||||
- sor0_clk
|
||||
- sor1_clk
|
||||
- sor2_clk
|
||||
- sor3_clk
|
||||
- sor_pad_input_clk
|
||||
- sor_padb_input_clk
|
||||
- sor_padc_input_clk
|
||||
- sor_padd_input_clk
|
||||
- sor0_pad_clk
|
||||
- sor1_pad_clk
|
||||
- sor2_pad_clk
|
||||
- sor3_pad_clk
|
||||
- sf0_clk
|
||||
- sf1_clk
|
||||
- sf2_clk
|
||||
- sf3_clk
|
||||
- sf4_clk
|
||||
- sf5_clk
|
||||
- sf6_clk
|
||||
- sf7_clk
|
||||
- sor0_ref_pll_clk
|
||||
- sor1_ref_pll_clk
|
||||
- sor2_ref_pll_clk
|
||||
- sor3_ref_pll_clk
|
||||
- sor0_ref_clk
|
||||
- sor1_ref_clk
|
||||
- sor2_ref_clk
|
||||
- sor3_ref_clk
|
||||
- osc_clk
|
||||
- dsc_clk
|
||||
- maud_clk
|
||||
- aza_2xbit_clk
|
||||
- disp_root
|
||||
- vpllx_sor0_muxed_clk
|
||||
- vpllx_sor1_muxed_clk
|
||||
- vpllx_sor2_muxed_clk
|
||||
- vpllx_sor3_muxed_clk
|
||||
- sf0_sor_clk
|
||||
- sf1_sor_clk
|
||||
- sf2_sor_clk
|
||||
- sf3_sor_clk
|
||||
- sf4_sor_clk
|
||||
- sf5_sor_clk
|
||||
- sf6_sor_clk
|
||||
- sf7_sor_clk
|
||||
- dpaux0_clk
|
||||
- emc_clk
|
||||
|
||||
|
||||
nvidia,disp-sw-soc-chip-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2650
|
||||
maximum: 0x2650
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x1f
|
||||
|
||||
reset-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- dpaux0_reset
|
||||
- hdacodec_reset
|
||||
|
||||
|
||||
interconnects:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x182
|
||||
maximum: 0x182
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
interconnect-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- read-1
|
||||
|
||||
non-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
iso_sid:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x900
|
||||
maximum: 0x900
|
||||
|
||||
niso_sid:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x901
|
||||
maximum: 0x901
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupt-names
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
display@8808c00000 {
|
||||
compatible = "nvidia,tegra264-display";
|
||||
power-domains = <&bpmp TEGRA264_POWER_DOMAIN_DISP>;
|
||||
nvidia,num-dpaux-instance = <0x00000004>;
|
||||
nvidia,bpmp = <&bpmp>;
|
||||
reg-names = "nvdisplay, dpaux0, hdacodec, mipical, vdisp";
|
||||
reg = <0x88 0x8c00000 0x00 0x1fffff>,
|
||||
<0x88 0x9680000 0x00 0x7ffff>,
|
||||
<0x88 0x9101000 0x00 0xfff>,
|
||||
<0x81 0x89840000 0x00 0xffff>,
|
||||
<0x88 0x8d00000 0x00 0x00010000>;
|
||||
interrupt-names = "nvdisplay, dpaux0, dpaux1, dpaux2, dpaux3, hdacodec, vdisp";
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA264_CLK_HUB>,
|
||||
<&bpmp TEGRA264_CLK_DISP>,
|
||||
<&bpmp TEGRA264_CLK_RG0_DIV>,
|
||||
<&bpmp TEGRA264_CLK_RG1_DIV>,
|
||||
<&bpmp TEGRA264_CLK_RG2_DIV>,
|
||||
<&bpmp TEGRA264_CLK_RG3_DIV>,
|
||||
<&bpmp TEGRA264_CLK_RG4_DIV>,
|
||||
<&bpmp TEGRA264_CLK_RG5_DIV>,
|
||||
<&bpmp TEGRA264_CLK_RG6_DIV>,
|
||||
<&bpmp TEGRA264_CLK_RG7_DIV>,
|
||||
<&bpmp TEGRA264_CLK_FUSE>,
|
||||
<&bpmp TEGRA264_CLK_SPPLL0_CLKOUT1A>,
|
||||
<&bpmp TEGRA264_CLK_SPPLL0_CLKOUT2A>,
|
||||
<&bpmp TEGRA264_CLK_SPPLL0_CLKOUT270>,
|
||||
<&bpmp TEGRA264_CLK_SPPLL1_CLKOUT270>,
|
||||
<&bpmp TEGRA264_CLK_SPPLL0_CLKOUT100>,
|
||||
<&bpmp TEGRA264_CLK_SPPLL1_CLKOUT100>,
|
||||
<&bpmp TEGRA264_CLK_VPLL0>,
|
||||
<&bpmp TEGRA264_CLK_VPLL1>,
|
||||
<&bpmp TEGRA264_CLK_VPLL2>,
|
||||
<&bpmp TEGRA264_CLK_VPLL3>,
|
||||
<&bpmp TEGRA264_CLK_VPLL4>,
|
||||
<&bpmp TEGRA264_CLK_VPLL5>,
|
||||
<&bpmp TEGRA264_CLK_VPLL6>,
|
||||
<&bpmp TEGRA264_CLK_VPLL7>,
|
||||
<&bpmp TEGRA264_CLK_RG0>,
|
||||
<&bpmp TEGRA264_CLK_RG1>,
|
||||
<&bpmp TEGRA264_CLK_RG2>,
|
||||
<&bpmp TEGRA264_CLK_RG3>,
|
||||
<&bpmp TEGRA264_CLK_RG4>,
|
||||
<&bpmp TEGRA264_CLK_RG5>,
|
||||
<&bpmp TEGRA264_CLK_RG6>,
|
||||
<&bpmp TEGRA264_CLK_RG7>,
|
||||
<&bpmp TEGRA264_CLK_DISPPLL>,
|
||||
<&bpmp TEGRA264_CLK_PRE_SOR0>,
|
||||
<&bpmp TEGRA264_CLK_PRE_SOR1>,
|
||||
<&bpmp TEGRA264_CLK_PRE_SOR2>,
|
||||
<&bpmp TEGRA264_CLK_PRE_SOR3>,
|
||||
<&bpmp TEGRA264_CLK_DP_LINKA_REF>,
|
||||
<&bpmp TEGRA264_CLK_DP_LINKB_REF>,
|
||||
<&bpmp TEGRA264_CLK_DP_LINKC_REF>,
|
||||
<&bpmp TEGRA264_CLK_DP_LINKD_REF>,
|
||||
<&bpmp TEGRA264_CLK_SOR_LINKA_INPUT>,
|
||||
<&bpmp TEGRA264_CLK_SOR_LINKB_INPUT>,
|
||||
<&bpmp TEGRA264_CLK_SOR_LINKC_INPUT>,
|
||||
<&bpmp TEGRA264_CLK_SOR_LINKD_INPUT>,
|
||||
<&bpmp TEGRA264_CLK_SOR_LINKA_AFIFO>,
|
||||
<&bpmp TEGRA264_CLK_SOR_LINKB_AFIFO>,
|
||||
<&bpmp TEGRA264_CLK_SOR_LINKC_AFIFO>,
|
||||
<&bpmp TEGRA264_CLK_SOR_LINKD_AFIFO>,
|
||||
<&bpmp TEGRA264_CLK_SOR0>,
|
||||
<&bpmp TEGRA264_CLK_SOR1>,
|
||||
<&bpmp TEGRA264_CLK_SOR2>,
|
||||
<&bpmp TEGRA264_CLK_SOR3>,
|
||||
<&bpmp TEGRA264_CLK_LINKA_SYM>,
|
||||
<&bpmp TEGRA264_CLK_LINKB_SYM>,
|
||||
<&bpmp TEGRA264_CLK_LINKC_SYM>,
|
||||
<&bpmp TEGRA264_CLK_LINKD_SYM>,
|
||||
<&bpmp TEGRA264_CLK_SOR0_PAD>,
|
||||
<&bpmp TEGRA264_CLK_SOR1_PAD>,
|
||||
<&bpmp TEGRA264_CLK_SOR2_PAD>,
|
||||
<&bpmp TEGRA264_CLK_SOR3_PAD>,
|
||||
<&bpmp TEGRA264_CLK_SF0>,
|
||||
<&bpmp TEGRA264_CLK_SF1>,
|
||||
<&bpmp TEGRA264_CLK_SF2>,
|
||||
<&bpmp TEGRA264_CLK_SF3>,
|
||||
<&bpmp TEGRA264_CLK_SF4>,
|
||||
<&bpmp TEGRA264_CLK_SF5>,
|
||||
<&bpmp TEGRA264_CLK_SF6>,
|
||||
<&bpmp TEGRA264_CLK_SF7>,
|
||||
<&bpmp TEGRA264_CLK_SOR0_PLL_REF>,
|
||||
<&bpmp TEGRA264_CLK_SOR1_PLL_REF>,
|
||||
<&bpmp TEGRA264_CLK_SOR2_PLL_REF>,
|
||||
<&bpmp TEGRA264_CLK_SOR3_PLL_REF>,
|
||||
<&bpmp TEGRA264_CLK_SOR0_REF>,
|
||||
<&bpmp TEGRA264_CLK_SOR1_REF>,
|
||||
<&bpmp TEGRA264_CLK_SOR2_REF>,
|
||||
<&bpmp TEGRA264_CLK_SOR3_REF>,
|
||||
<&bpmp TEGRA264_CLK_OSC>,
|
||||
<&bpmp TEGRA264_CLK_DSC>,
|
||||
<&bpmp TEGRA264_CLK_MAUD>,
|
||||
<&bpmp TEGRA264_CLK_AZA_2XBIT>,
|
||||
<&bpmp TEGRA264_CLK_DISP_ROOT>,
|
||||
<&bpmp TEGRA264_CLK_VPLLX_SOR0_MUXED>,
|
||||
<&bpmp TEGRA264_CLK_VPLLX_SOR1_MUXED>,
|
||||
<&bpmp TEGRA264_CLK_VPLLX_SOR2_MUXED>,
|
||||
<&bpmp TEGRA264_CLK_VPLLX_SOR3_MUXED>,
|
||||
<&bpmp TEGRA264_CLK_SF0_SOR>,
|
||||
<&bpmp TEGRA264_CLK_SF1_SOR>,
|
||||
<&bpmp TEGRA264_CLK_SF2_SOR>,
|
||||
<&bpmp TEGRA264_CLK_SF3_SOR>,
|
||||
<&bpmp TEGRA264_CLK_SF4_SOR>,
|
||||
<&bpmp TEGRA264_CLK_SF5_SOR>,
|
||||
<&bpmp TEGRA264_CLK_SF6_SOR>,
|
||||
<&bpmp TEGRA264_CLK_SF7_SOR>,
|
||||
<&bpmp TEGRA264_CLK_DPAUX>,
|
||||
<&bpmp TEGRA264_CLK_EMC>;
|
||||
clock-names = "nvdisplayhub_clk",
|
||||
"nvdisplay_disp_clk",
|
||||
"nvdisplay_p0_clk",
|
||||
"nvdisplay_p1_clk",
|
||||
"nvdisplay_p2_clk",
|
||||
"nvdisplay_p3_clk",
|
||||
"nvdisplay_p4_clk",
|
||||
"nvdisplay_p5_clk",
|
||||
"nvdisplay_p6_clk",
|
||||
"nvdisplay_p7_clk",
|
||||
"fuse_clk",
|
||||
"sppll0_clkouta_clk",
|
||||
"sppll0_clkoutb_clk",
|
||||
"sppll0_clkoutpn_clk",
|
||||
"sppll1_clkoutpn_clk",
|
||||
"sppll0_div27_clk",
|
||||
"sppll1_div27_clk",
|
||||
"vpll0_clk",
|
||||
"vpll1_clk",
|
||||
"vpll2_clk",
|
||||
"vpll3_clk",
|
||||
"vpll4_clk",
|
||||
"vpll5_clk",
|
||||
"vpll6_clk",
|
||||
"vpll7_clk",
|
||||
"rg0_clk",
|
||||
"rg1_clk",
|
||||
"rg2_clk",
|
||||
"rg3_clk",
|
||||
"rg4_clk",
|
||||
"rg5_clk",
|
||||
"rg6_clk",
|
||||
"rg7_clk",
|
||||
"disppll_clk",
|
||||
"pre_sor0_clk",
|
||||
"pre_sor1_clk",
|
||||
"pre_sor2_clk",
|
||||
"pre_sor3_clk",
|
||||
"dp_link_ref_clk",
|
||||
"dp_linkb_ref_clk",
|
||||
"dp_linkc_ref_clk",
|
||||
"dp_linkd_ref_clk",
|
||||
"sor_linka_input_clk",
|
||||
"sor_linkb_input_clk",
|
||||
"sor_linkc_input_clk",
|
||||
"sor_linkd_input_clk",
|
||||
"sor_linka_afifo_clk",
|
||||
"sor_linkb_afifo_clk",
|
||||
"sor_linkc_afifo_clk",
|
||||
"sor_linkd_afifo_clk",
|
||||
"sor0_clk",
|
||||
"sor1_clk",
|
||||
"sor2_clk",
|
||||
"sor3_clk",
|
||||
"sor_pad_input_clk",
|
||||
"sor_padb_input_clk",
|
||||
"sor_padc_input_clk",
|
||||
"sor_padd_input_clk",
|
||||
"sor0_pad_clk",
|
||||
"sor1_pad_clk",
|
||||
"sor2_pad_clk",
|
||||
"sor3_pad_clk",
|
||||
"sf0_clk",
|
||||
"sf1_clk",
|
||||
"sf2_clk",
|
||||
"sf3_clk",
|
||||
"sf4_clk",
|
||||
"sf5_clk",
|
||||
"sf6_clk",
|
||||
"sf7_clk",
|
||||
"sor0_ref_pll_clk",
|
||||
"sor1_ref_pll_clk",
|
||||
"sor2_ref_pll_clk",
|
||||
"sor3_ref_pll_clk",
|
||||
"sor0_ref_clk",
|
||||
"sor1_ref_clk",
|
||||
"sor2_ref_clk",
|
||||
"sor3_ref_clk",
|
||||
"osc_clk",
|
||||
"dsc_clk",
|
||||
"maud_clk",
|
||||
"aza_2xbit_clk",
|
||||
"disp_root",
|
||||
"vpllx_sor0_muxed_clk",
|
||||
"vpllx_sor1_muxed_clk",
|
||||
"vpllx_sor2_muxed_clk",
|
||||
"vpllx_sor3_muxed_clk",
|
||||
"sf0_sor_clk",
|
||||
"sf1_sor_clk",
|
||||
"sf2_sor_clk",
|
||||
"sf3_sor_clk",
|
||||
"sf4_sor_clk",
|
||||
"sf5_sor_clk",
|
||||
"sf6_sor_clk",
|
||||
"sf7_sor_clk",
|
||||
"dpaux0_clk",
|
||||
"emc_clk";
|
||||
nvidia,disp-sw-soc-chip-id = <0x2650>;
|
||||
resets = <&bpmp TEGRA264_RESET_DPAUX>,
|
||||
<&bpmp TEGRA264_RESET_HDACODEC>;
|
||||
reset-names = "dpaux0_reset, hdacodec_reset";
|
||||
interconnects = <&mc TEGRA264_MEMORY_CLIENT_DISPR &emc>;
|
||||
interconnect-names = "read-1";
|
||||
status = "disabled";
|
||||
iommus = <&smmu3_mmu 0x900>;
|
||||
non-coherent;
|
||||
};
|
||||
@@ -1,162 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/hda@88090b0000/nvidia,tegra264-hda.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra T264 HDA Driver
|
||||
|
||||
maintainers:
|
||||
- Mohan Kumar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/hda@88090b0000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-hda
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x88
|
||||
maximum: 0x88
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x90b0000
|
||||
maximum: 0x90b0000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xfb
|
||||
maximum: 0xfb
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8f
|
||||
maximum: 0x8f
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- hda
|
||||
|
||||
|
||||
interconnects:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x17c
|
||||
maximum: 0x17d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
interconnect-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- dma-mem
|
||||
- write
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xa00
|
||||
maximum: 0xa00
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
hda@88090b0000 {
|
||||
compatible = "nvidia,tegra264-hda";
|
||||
reg = <0x88 0x90b0000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA264_CLK_AZA_2XBIT>;
|
||||
clock-names = "hda";
|
||||
interconnects = <&mc TEGRA264_MEMORY_CLIENT_HDAR &emc>,
|
||||
<&mc TEGRA264_MEMORY_CLIENT_HDAW &emc>;
|
||||
interconnect-names = "dma-mem, write";
|
||||
iommus = <&smmu3_mmu TEGRA_SID_HDA>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,78 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/isp-thi@8188b00000/nvidia,tegra264-isp-thi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra t264 ISP-THI
|
||||
|
||||
maintainers:
|
||||
- Chinniah Poosapadi
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-isp-thi
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-isp-thi
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x37
|
||||
maximum: 0x37
|
||||
|
||||
reset-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- isp_thi
|
||||
- isp1_thi
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- resets
|
||||
- reset-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
isp-thi@8188b00000 {
|
||||
compatible = "nvidia,tegra264-isp-thi";
|
||||
resets = <&bpmp TEGRA264_RESET_ISP1>;
|
||||
reset-names = "isp_thi";
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,49 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mixer-controls/nvidia,tegra264-mixer-control.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra t264 Audio Mixer
|
||||
|
||||
maintainers:
|
||||
- Mohan Kumar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /sound/mixer-controls
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-mixer-control
|
||||
- nvidia,tegra234-mixer-control
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
mixer-controls {
|
||||
compatible = "nvidia,tegra264-mixer-control",
|
||||
"nvidia,tegra234-mixer-control";
|
||||
};
|
||||
@@ -1,290 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/rtcpu@81893d0000/nvidia,tegra264-rce.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra T264 RCE Driver
|
||||
|
||||
maintainers:
|
||||
- Evgeny Kornev
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /rtcpu@81893d0000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-rce
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,cpu-name:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- rce
|
||||
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x893d0000
|
||||
maximum: 0x893d0000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- rce-pm
|
||||
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x23
|
||||
maximum: 0x24
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- rce-nic
|
||||
- rce-cpu
|
||||
|
||||
|
||||
nvidia,clock-rates:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6ddd000
|
||||
maximum: 0x6ddd000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1bc69880
|
||||
maximum: 0x1bc69880
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
reset-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- rce-all
|
||||
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x19e
|
||||
maximum: 0x19e
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
interrupt-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- wdt-remote
|
||||
|
||||
|
||||
nvidia,camera-devices:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 5
|
||||
maxItems: 5
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
nvidia,camera-device-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- isp
|
||||
- vi0
|
||||
- vi1
|
||||
- nvcsi
|
||||
- isp1
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2b01
|
||||
maximum: 0x2b01
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
nvidia,test-bw:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x249f00
|
||||
maximum: 0x249f00
|
||||
|
||||
nvidia,trace:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x70100000
|
||||
maximum: 0x70100000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x100000
|
||||
maximum: 0x100000
|
||||
|
||||
nvidia,ivc-channels:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x90000000
|
||||
maximum: 0x90000000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
nvidia,autosuspend-delay-ms:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1388
|
||||
maximum: 0x1388
|
||||
|
||||
nvidia,cmd-timeout:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7d0
|
||||
maximum: 0x7d0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
rtcpu@81893d0000 {
|
||||
compatible = "nvidia,tegra264-rce";
|
||||
nvidia,cpu-name = "rce";
|
||||
reg = <0x81 0x893d0000 0x0 0x10000>;
|
||||
reg-names = "rce-pm";
|
||||
clocks = <&bpmp TEGRA264_CLK_RCE_NIC>,
|
||||
<&bpmp TEGRA264_CLK_RCE_CPU>;
|
||||
clock-names = "rce-nic, rce-cpu";
|
||||
nvidia,clock-rates = <115200000 466000000>,
|
||||
<115200000 466000000>;
|
||||
resets = <&bpmp TEGRA264_RESET_RCE_ALL>;
|
||||
reset-names = "rce-all";
|
||||
interrupts = <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "wdt-remote";
|
||||
nvidia,camera-devices = <&isp &vi0 &vi1 &nvcsi &isp1>;
|
||||
nvidia,camera-device-names = "isp, vi0, vi1, nvcsi, isp1";
|
||||
iommus = <&smmu4_mmu TEGRA_SID_RCE_VM1>;
|
||||
memory-region = <&rce_resv>;
|
||||
dma-coherent;
|
||||
nvidia,test-bw = <2400000>;
|
||||
nvidia,trace = <&tegra_rtcpu_trace 4 0x70100000 0x100000>;
|
||||
nvidia,ivc-channels = <&camera_ivc_channels 2 0x90000000 0x10000>;
|
||||
nvidia,autosuspend-delay-ms = <5000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,125 +0,0 @@
|
||||
# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/rtc@c2c0000/nvidia,tegra264-rtc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra T264 RTC Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/rtc@c2c0000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-rtc
|
||||
- nvidia,tegra234-rtc
|
||||
- nvidia,tegra20-rtc
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc2c0000
|
||||
maximum: 0xc2c0000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
interrupt-parent:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 2 values with interrupt-parent phandle:
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x41
|
||||
maximum: 0x41
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- rtc
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
rtc@c2c0000 {
|
||||
compatible = "nvidia,tegra264-rtc",
|
||||
"nvidia,tegra234-rtc",
|
||||
"nvidia,tegra20-rtc";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x0c2c0000 0x0 0x10000>;
|
||||
interrupt-parent = <&pmc>;
|
||||
interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA264_CLK_CLK_S>;
|
||||
clock-names = "rtc";
|
||||
};
|
||||
@@ -1,164 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tsec@8188150000/nvidia,tegra264-tsec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra t264 Host1X TSEC
|
||||
|
||||
maintainers:
|
||||
- Nikesh Oswal
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/host1x@8181200000/tsec@8188150000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-tsec
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x88150000
|
||||
maximum: 0x88150000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40000
|
||||
maximum: 0x40000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1bf
|
||||
maximum: 0x1bf
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2d
|
||||
maximum: 0x2d
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x30
|
||||
maximum: 0xc8
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- tsec
|
||||
- efuse
|
||||
- tsec_pka
|
||||
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2900
|
||||
maximum: 0x2900
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- resets
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
tsec@8188150000 {
|
||||
compatible = "nvidia,tegra264-tsec";
|
||||
reg = <0x81 0x88150000 0x00 0x40000>;
|
||||
interrupts = <GIC_SPI 0x1bF IRQ_TYPE_LEVEL_HIGH>;
|
||||
resets = <&bpmp TEGRA264_RESET_TSEC>;
|
||||
clocks = <&bpmp TEGRA264_CLK_TSEC>,
|
||||
<&bpmp TEGRA264_CLK_FUSE>,
|
||||
<&bpmp TEGRA264_CLK_TSEC_PKA>;
|
||||
clock-names = "tsec, efuse, tsec_pka";
|
||||
iommus = <&smmu4_mmu TEGRA_SID_TSEC>;
|
||||
dma-coherent;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,141 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/virt-alt-pcm-oot/nvidia,tegra264-virt-pcm-oot.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Virtual Pulse Code Modulator
|
||||
|
||||
maintainers:
|
||||
- Mohan Kumar
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /virt-alt-pcm-oot
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-virt-pcm-oot
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
cardname:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- tegra-virt-pcm-vm1
|
||||
|
||||
|
||||
dmas:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x82
|
||||
|
||||
dma-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- rx1
|
||||
- tx1
|
||||
- rx2
|
||||
- tx2
|
||||
- rx3
|
||||
- tx3
|
||||
- rx4
|
||||
- tx4
|
||||
- rx5
|
||||
- tx5
|
||||
- rx6
|
||||
- tx6
|
||||
- rx7
|
||||
- tx7
|
||||
- rx8
|
||||
- tx8
|
||||
- rx9
|
||||
- tx9
|
||||
- rx10
|
||||
- tx10
|
||||
- rx11
|
||||
- tx11
|
||||
- rx12
|
||||
- tx12
|
||||
- rx13
|
||||
- tx13
|
||||
- rx14
|
||||
- tx14
|
||||
- rx15
|
||||
- tx15
|
||||
- rx16
|
||||
- tx16
|
||||
- rx17
|
||||
- tx17
|
||||
- rx18
|
||||
- tx18
|
||||
- rx19
|
||||
- tx19
|
||||
- rx20
|
||||
- tx20
|
||||
- rx21
|
||||
- tx21
|
||||
- rx22
|
||||
- tx22
|
||||
- rx23
|
||||
- tx23
|
||||
- rx24
|
||||
- tx24
|
||||
|
||||
|
||||
ivc_queue:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xf
|
||||
maximum: 0xa2
|
||||
|
||||
admaif_ch_num:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x18
|
||||
maximum: 0x18
|
||||
|
||||
admaif_ch_list:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x18
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- iommus
|
||||
|
||||
examples:
|
||||
- |
|
||||
virt-alt-pcm-oot {
|
||||
};
|
||||
@@ -1,97 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/nvscic2c-pcie-s0-c5-epc/nvidia,tegra-nvscic2c-pcie-epc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Chip-to-Chip transfer module for PCIeRP
|
||||
|
||||
maintainers:
|
||||
- Manikanta Maddireddy
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-nvscic2c-pcie-epc is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/nvscic2c-pcie/dt.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /nvscic2c-pcie-s0-c5-epc
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-nvscic2c-pcie-epc
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,host1x:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x19
|
||||
maximum: 0x19
|
||||
|
||||
nvidia,pcie-edma:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7b
|
||||
maximum: 0x7b
|
||||
|
||||
nvidia,pci-dev-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x22cc
|
||||
maximum: 0x22cc
|
||||
|
||||
nvidia,board-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,soc-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,cntrlr-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x5
|
||||
|
||||
nvidia,endpoint-db:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- nvscic2c_pcie_s0_c5_1, 16, 00032768, 67108864, 26001
|
||||
- nvscic2c_pcie_s0_c5_2, 16, 00032768, 67108864, 26002
|
||||
- nvscic2c_pcie_s0_c5_3, 16, 00032768, 67108864, 26003
|
||||
- nvscic2c_pcie_s0_c5_4, 16, 00032768, 67108864, 26004
|
||||
- nvscic2c_pcie_s0_c5_5, 16, 00032768, 67108864, 26005
|
||||
- nvscic2c_pcie_s0_c5_6, 16, 00032768, 67108864, 26006
|
||||
- nvscic2c_pcie_s0_c5_7, 16, 00032768, 67108864, 26007
|
||||
- nvscic2c_pcie_s0_c5_8, 16, 00032768, 67108864, 26008
|
||||
- nvscic2c_pcie_s0_c5_9, 16, 00032768, 67108864, 26009
|
||||
- nvscic2c_pcie_s0_c5_10, 16, 00032768, 67108864, 26010
|
||||
- nvscic2c_pcie_s0_c5_11, 16, 00032768, 67108864, 26011
|
||||
- nvscic2c_pcie_s0_c5_12, 16, 00000064, 0, 26012
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
nvscic2c-pcie-s0-c5-epc {
|
||||
};
|
||||
@@ -1,102 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/nvscic2c-pcie-s0-c4-epf/nvidia,tegra-nvscic2c-pcie-epf.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Chip-to-Chip transfer module for PCIeEP
|
||||
|
||||
maintainers:
|
||||
- Manikanta Maddireddy
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-nvscic2c-pcie-epf is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/misc/nvscic2c-pcie/dt.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /nvscic2c-pcie-s0-c4-epf
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-nvscic2c-pcie-epf
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,host1x:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x19
|
||||
maximum: 0x19
|
||||
|
||||
nvidia,pcie-edma:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7c
|
||||
maximum: 0x7c
|
||||
|
||||
nvidia,pci-dev-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x22cc
|
||||
maximum: 0x22cc
|
||||
|
||||
nvidia,board-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,soc-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,cntrlr-id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x5
|
||||
|
||||
nvidia,bar-win-size:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40000000
|
||||
maximum: 0x40000000
|
||||
|
||||
nvidia,endpoint-db:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- nvscic2c_pcie_s0_c4_1, 16, 00032768, 67108864, 26101
|
||||
- nvscic2c_pcie_s0_c4_2, 16, 00032768, 67108864, 26102
|
||||
- nvscic2c_pcie_s0_c4_3, 16, 00032768, 67108864, 26103
|
||||
- nvscic2c_pcie_s0_c4_4, 16, 00032768, 67108864, 26104
|
||||
- nvscic2c_pcie_s0_c4_5, 16, 00032768, 67108864, 26105
|
||||
- nvscic2c_pcie_s0_c4_6, 16, 00032768, 67108864, 26106
|
||||
- nvscic2c_pcie_s0_c4_7, 16, 00032768, 67108864, 26107
|
||||
- nvscic2c_pcie_s0_c4_8, 16, 00032768, 67108864, 26108
|
||||
- nvscic2c_pcie_s0_c4_9, 16, 00032768, 67108864, 26109
|
||||
- nvscic2c_pcie_s0_c4_10, 16, 00032768, 67108864, 26110
|
||||
- nvscic2c_pcie_s0_c4_11, 16, 00032768, 67108864, 26111
|
||||
- nvscic2c_pcie_s0_c4_12, 16, 00000064, 0, 26112
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
nvscic2c-pcie-s0-c4-epf {
|
||||
};
|
||||
@@ -1,49 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sha-carveout/sha-carveout.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: SHA Carveout Configuration
|
||||
|
||||
maintainers:
|
||||
- Mahesh Kumar
|
||||
- Srijan Kumar Sharma
|
||||
|
||||
description: |
|
||||
The following nodes use this compatibility
|
||||
- /dce@8808000000/sha-carveout
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- sha-carveout
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
sha-carveout {
|
||||
compatible = "sha-carveout";
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,309 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sdhci@810c570000/nvidia,tegra264-sdhci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: SDHCI driver for Tegra
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-sdhci is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/mmc/host/sdhci-tegra.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/sdhci@810c570000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-sdhci
|
||||
- nvidia,tegra194-sdhci
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc570000
|
||||
maximum: 0xc570000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10000
|
||||
maximum: 0x10000
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xa2
|
||||
maximum: 0xa2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
sd-uhs-sdr104:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
sd-uhs-sdr50:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
sd-uhs-sdr25:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
sd-uhs-sdr12:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
mmc-hs200-1_8v:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
iommus:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
iommus are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Device ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1200
|
||||
maximum: 0x1200
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
nvidia,pad-autocal-pull-up-offset-3v3-timeout:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
|
||||
nvidia,pad-autocal-pull-down-offset-3v3-timeout:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
|
||||
nvidia,pad-autocal-pull-up-offset-1v8-timeout:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6
|
||||
maximum: 0x6
|
||||
|
||||
nvidia,pad-autocal-pull-down-offset-1v8-timeout:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
|
||||
nvidia,pad-autocal-pull-up-offset-sdr104:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,pad-autocal-pull-down-offset-sdr104:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
interconnects:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1c2
|
||||
maximum: 0x1c3
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
interconnect-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- dma-mem
|
||||
- write
|
||||
|
||||
|
||||
pinctrl-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- sdmmc-3v3
|
||||
- sdmmc-1v8
|
||||
|
||||
|
||||
pinctrl-0:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
pinctrl-1:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
nvidia,default-tap:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6
|
||||
maximum: 0x6
|
||||
|
||||
nvidia,default-trim:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
assigned-clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x95
|
||||
maximum: 0x96
|
||||
|
||||
assigned-clock-parents:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x93
|
||||
maximum: 0x95
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x22
|
||||
maximum: 0x22
|
||||
|
||||
reset-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- sdhci
|
||||
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x96
|
||||
maximum: 0x97
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- sdhci
|
||||
- tmclk
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- iommus
|
||||
- resets
|
||||
- reset-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
sdhci@810c570000 {
|
||||
compatible = "nvidia,tegra264-sdhci, nvidia,tegra194-sdhci";
|
||||
status = "disabled";
|
||||
reg = <0x81 0xc570000 0x00 0x10000>;
|
||||
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
|
||||
sd-uhs-sdr104;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr25;
|
||||
sd-uhs-sdr12;
|
||||
mmc-hs200-1_8v;
|
||||
iommus = <&smmu2_mmu TEGRA_SID_SDMMC0>;
|
||||
dma-coherent;
|
||||
nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
|
||||
nvidia,pad-autocal-pull-down-offset-3v3-timeout = <0x07>;
|
||||
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
|
||||
nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x07>;
|
||||
nvidia,pad-autocal-pull-up-offset-sdr104 = <0x00>;
|
||||
nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>;
|
||||
interconnects = <&mc TEGRA264_MEMORY_CLIENT_SDMMC0R &emc>,
|
||||
<&mc TEGRA264_MEMORY_CLIENT_SDMMC0W &emc>;
|
||||
interconnect-names = "dma-mem, write";
|
||||
pinctrl-names = "sdmmc-3v3, sdmmc-1v8";
|
||||
pinctrl-0 = <&sdmmc1_3v3>;
|
||||
pinctrl-1 = <&sdmmc1_1v8>;
|
||||
nvidia,default-tap = <6>;
|
||||
nvidia,default-trim = <0>;
|
||||
assigned-clocks = <&bpmp TEGRA264_CLK_SDMMC1>,
|
||||
<&bpmp TEGRA264_CLK_PLLC4_MUXED>;
|
||||
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLC4_MUXED>,
|
||||
<&bpmp TEGRA264_CLK_PLLC4_OUT0>;
|
||||
resets = <&bpmp TEGRA264_RESET_SDMMC1>;
|
||||
reset-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA264_CLK_SDMMC1>,
|
||||
<&bpmp TEGRA264_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci, tmclk";
|
||||
};
|
||||
@@ -1,86 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/tegra_virt_storage83/nvidia,tegra-virt-mtd-storage.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra t264 Hypervisor MTD Driver
|
||||
|
||||
maintainers:
|
||||
- Sreenivas Velpula
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra-virt-mtd-storage is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/mtd/devices/tegra_hv_mtd.c
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-virt-mtd-storage
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra-virt-mtd-storage
|
||||
|
||||
instance:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
ivc:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xf
|
||||
maximum: 0x3f
|
||||
|
||||
read-only:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
mempool:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x17
|
||||
maximum: 0x17
|
||||
|
||||
partition-name:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- board-info
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
tegra_virt_storage83 {
|
||||
compatible = "nvidia,tegra-virt-mtd-storage";
|
||||
status = "okay";
|
||||
instance = <0x00000000>;
|
||||
ivc = <0x0000000f>,
|
||||
<0x0000003f>;
|
||||
read-only;
|
||||
mempool = <0x00000017>;
|
||||
partition-name = "board-info";
|
||||
};
|
||||
@@ -1,80 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/flash@0/jedec,spi-nor.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Framework for SPI NOR
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = jedec,spi-nor is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/mtd/spi-nor/core.c
|
||||
- <TOP>/kernel/kernel-oot/drivers/memory/renesas-rpc-if.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/spi@810c5b0000/flash@0
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- jedec,spi-nor
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
spi-max-frequency:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6146580
|
||||
maximum: 0x6146580
|
||||
|
||||
spi-rx-bus-width:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
spi-tx-bus-width:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
flash@0 {
|
||||
};
|
||||
@@ -1,186 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mttcan@81102f0000/nvidia,tegra264-mttcan.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Platform CAN bus driver for Bosch M_TTCAN controller
|
||||
|
||||
maintainers:
|
||||
- Shubhi Garg
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-mttcan is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/can/mttcan/native/m_ttcan_linux.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/mttcan@81102f0000
|
||||
- /bus@0/mttcan@8110300000
|
||||
- /bus@0/mttcan@8110330000
|
||||
- /bus@0/mttcan@8110340000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-mttcan
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x81
|
||||
maximum: 0x81
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x102f0000
|
||||
maximum: 0x10342000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x32
|
||||
maximum: 0x1000
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- can-regs
|
||||
- glue-regs
|
||||
- msg-ram
|
||||
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x44
|
||||
maximum: 0x4a
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
mram-params:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 9
|
||||
maxItems: 9
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x10
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x10
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x20
|
||||
maximum: 0x20
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x10
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x10
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x10
|
||||
|
||||
tx-config:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x10
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40
|
||||
maximum: 0x40
|
||||
|
||||
rx-config:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40
|
||||
maximum: 0x40
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40
|
||||
maximum: 0x40
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40
|
||||
maximum: 0x40
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
mttcan@81102f0000 {
|
||||
compatible = "nvidia,tegra264-mttcan";
|
||||
reg = <0x81 0x102f0000 0x00 0x144>,
|
||||
<0x81 0x102f1000 0x00 0x32>,
|
||||
<0x81 0x102f2000 0x00 0x1000>;
|
||||
reg-names = "can-regs, glue-regs, msg-ram";
|
||||
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
|
||||
mram-params = <0 16 16 32 0 0 16 16 16>;
|
||||
tx-config = <0 16 0 64>;
|
||||
rx-config = <64 64 64>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,661 +0,0 @@
|
||||
# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ethernet@a808a10000/nvidia,tegra264-mgbe.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Ethernet Driver
|
||||
|
||||
maintainers:
|
||||
- Narayan Reddy
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-mgbe is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/ethernet@a808a10000
|
||||
- /bus@0/ethernet@a808b10000
|
||||
- /bus@0/ethernet@a808d10000
|
||||
- /bus@0/ethernet@a808e10000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-mgbe
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xa8
|
||||
maximum: 0xa8
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8a10000
|
||||
maximum: 0x8ed0000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2000
|
||||
maximum: 0x10000
|
||||
|
||||
reg-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- mac
|
||||
- dma_base
|
||||
- macsec-base
|
||||
|
||||
|
||||
interrupts:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Interrupts are give by a tuple of 3 values:
|
||||
- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
|
||||
definitions in dt-bindings/interrupt-controller/arm-gic.h
|
||||
- interrupt number
|
||||
- trigger type (rising edge, falling edge, both, etc)
|
||||
definitions in dt-bindings/interrupt-controller/irq.h
|
||||
items:
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x366
|
||||
maximum: 0x385
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
|
||||
interrupt-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- common
|
||||
- vm0
|
||||
- vm1
|
||||
- vm2
|
||||
- vm3
|
||||
- vm4
|
||||
- macsec-ns-irq
|
||||
- macsec-s-irq
|
||||
|
||||
|
||||
resets:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Resets are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Reset ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3e
|
||||
maximum: 0x49
|
||||
|
||||
reset-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- mac
|
||||
- pcs
|
||||
- macsec_ns_rst
|
||||
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xd5
|
||||
maximum: 0x1d2
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- mac
|
||||
- tx
|
||||
- mgbe
|
||||
- macsec
|
||||
- tx-pcs
|
||||
- ptp-ref
|
||||
- rx-input
|
||||
- rx-pcs-input
|
||||
- tx-m
|
||||
- rx-input-m
|
||||
- rx-pcs-m
|
||||
- utmi_pll1_clk
|
||||
- pll_bpmpcam
|
||||
- tx_ser
|
||||
- rx_ser
|
||||
|
||||
|
||||
nvidia,num-dma-chans:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
|
||||
nvidia,dma-chans:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 8
|
||||
maxItems: 8
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5
|
||||
maximum: 0x5
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6
|
||||
maximum: 0x6
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
|
||||
nvidia,num-mtl-queues:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
|
||||
nvidia,mtl-queues:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 10
|
||||
maxItems: 10
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5
|
||||
maximum: 0x5
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6
|
||||
maximum: 0x6
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x9
|
||||
maximum: 0x9
|
||||
|
||||
nvidia,tc-mapping:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 10
|
||||
maxItems: 10
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5
|
||||
maximum: 0x5
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6
|
||||
maximum: 0x6
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,residual-queue:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,rxq_enable_ctrl:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 10
|
||||
maxItems: 10
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
|
||||
nvidia,vm-irq-config:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
nvidia,vm-vdma-config:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
nvidia,tx-queue-prio:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 10
|
||||
maxItems: 10
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x5
|
||||
maximum: 0x5
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x6
|
||||
maximum: 0x6
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7
|
||||
maximum: 0x7
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,rx-queue-prio:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 10
|
||||
maxItems: 10
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2
|
||||
maximum: 0x2
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x4
|
||||
maximum: 0x4
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x10
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x20
|
||||
maximum: 0x20
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40
|
||||
maximum: 0x40
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x80
|
||||
maximum: 0x80
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,dcs-enable:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,macsec-enable:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,mgbe-riit-config:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
nvidia,rx_riwt:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x200
|
||||
maximum: 0x200
|
||||
|
||||
nvidia,rx_frames:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x40
|
||||
maximum: 0x40
|
||||
|
||||
nvidia,tx_usecs:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x100
|
||||
maximum: 0x100
|
||||
|
||||
nvidia,tx_frames:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x10
|
||||
|
||||
nvidia,phy-iface-mode:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,promisc_mode:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,slot_num_check:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 8
|
||||
maxItems: 8
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
|
||||
nvidia,slot_intvl_vals:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
items:
|
||||
minItems: 8
|
||||
maxItems: 8
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7d
|
||||
maximum: 0x7d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7d
|
||||
maximum: 0x7d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7d
|
||||
maximum: 0x7d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7d
|
||||
maximum: 0x7d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7d
|
||||
maximum: 0x7d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7d
|
||||
maximum: 0x7d
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x7d
|
||||
maximum: 0x7d
|
||||
|
||||
nvidia,ptp_ref_clock_speed:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x12a05f20
|
||||
maximum: 0x12a05f20
|
||||
|
||||
nvidia,instance_id:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x3
|
||||
|
||||
nvidia,ptp-rx-queue:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x3
|
||||
maximum: 0x3
|
||||
|
||||
nvidia,dma_rx_ring_sz:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x1000
|
||||
|
||||
nvidia,dma_tx_ring_sz:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000
|
||||
maximum: 0x1000
|
||||
|
||||
dma-coherent:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
|
||||
nvidia,mac-addr-idx:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x4
|
||||
|
||||
nvidia,uphy-gbe-mode:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
nvidia,max-platform-mtu:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x2328
|
||||
maximum: 0x2328
|
||||
|
||||
nvidia,if-name:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- mgbe0_0
|
||||
- mgbe1_0
|
||||
- mgbe2_0
|
||||
- mgbe3_0
|
||||
|
||||
|
||||
ivc:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x10
|
||||
maximum: 0x1af
|
||||
|
||||
nvidia,ptp_m2m_role:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x2
|
||||
|
||||
nvidia,pps_op_ctrl:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x8
|
||||
maximum: 0x8
|
||||
|
||||
nvidia,mdc-cr:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xF
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- resets
|
||||
- reset-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
ethernet@a808a10000 {
|
||||
compatible = "nvidia,tegra264-mgbe";
|
||||
status = "disabled";
|
||||
reg = <0xa8 0x8a10000 0x00 0x10000>,
|
||||
<0xa8 0x8aa0000 0x00 0x10000>,
|
||||
<0xa8 0x8ad0000 0x00 0x10000>,
|
||||
<0xa8 0x8a00000 0x00 0x10000>;
|
||||
reg-names = "mac, xpcs, macsec-base, hypervisor";
|
||||
interrupts = <0 870 4>,
|
||||
<0 873 4>,
|
||||
<0 874 4>,
|
||||
<0 875 4>,
|
||||
<0 876 4>,
|
||||
<0 877 4>,
|
||||
<0 872 4>,
|
||||
<0 871 4>;
|
||||
interrupt-names = "common, vm0, vm1, vm2, vm3, vm4",
|
||||
"macsec-ns-irq, macsec-s-irq";
|
||||
resets = <&bpmp TEGRA264_RESET_MGBE0_MAC>,
|
||||
<&bpmp TEGRA264_RESET_MGBE0_PCS>,
|
||||
<&bpmp TEGRA264_RESET_MGBE0_MACSEC>;
|
||||
reset-names = "mac, pcs, macsec_ns_rst";
|
||||
clocks = <&bpmp TEGRA264_CLK_MGBE0_MAC>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_TX>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_APP>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_MACSEC>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_TX_PCS>,
|
||||
<&bpmp TEGRA264_CLK_MGBES_PTP_REF>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_RX_IN>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_RX_PCS_IN>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_TX_M>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_RX_M>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_RX_PCS_M>,
|
||||
<&bpmp TEGRA264_CLK_UTMI_PLL1_CLKOUT480>,
|
||||
<&bpmp TEGRA264_CLK_PLLBPMPCAM>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_TX_SER>,
|
||||
<&bpmp TEGRA264_CLK_MGBE0_RX_SER>;
|
||||
clock-names = "mac, tx, mgbe, macsec, tx-pcs, ptp-ref",
|
||||
"rx-input, rx-pcs-input, tx-m, rx-input-m",
|
||||
"rx-pcs-m, utmi_pll1_clk, pll_bpmpcam, tx_ser, rx_ser";
|
||||
nvidia,num-dma-chans = <8>;
|
||||
nvidia,dma-chans = <0 1 2 3 4 5 6 7>;
|
||||
iommus = <&smmu0_mmu TEGRA_SID_MGBE0_VF0>;
|
||||
nvidia,num-mtl-queues = <10>;
|
||||
nvidia,mtl-queues = <0 1 2 3 4 5 6 7 8 9>;
|
||||
nvidia,tc-mapping = <0 1 2 3 4 5 6 7 0 1>;
|
||||
nvidia,residual-queue = <1>;
|
||||
nvidia,rxq_enable_ctrl = <2 2 2 2 2 2 2 2 2 2>;
|
||||
nvidia,vm-irq-config = <&mgbe_vm_irq_config>;
|
||||
nvidia,vm-vdma-config = <&mgbe_vm_vdma_config>;
|
||||
nvidia,tx-queue-prio = <0 1 2 3 4 5 6 7 0 0>;
|
||||
nvidia,rx-queue-prio = <0x1 0x2 0x4 0x8 0x10 0x20 0x40 0x80 0x0 0x0>;
|
||||
nvidia,dcs-enable = <0x1>;
|
||||
nvidia,macsec-enable = <0x1>;
|
||||
nvidia,mgbe-riit-config = <&mgbe_riit_config>;
|
||||
nvidia,rx_riwt = <512>;
|
||||
nvidia,rx_frames = <64>;
|
||||
nvidia,tx_usecs = <256>;
|
||||
nvidia,tx_frames = <16>;
|
||||
nvidia,phy-iface-mode = <2>;
|
||||
nvidia,promisc_mode = <1>;
|
||||
nvidia,slot_num_check = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
|
||||
nvidia,slot_intvl_vals = <0x0 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D>;
|
||||
nvidia,ptp_ref_clock_speed = <312500000>;
|
||||
nvidia,instance_id = <0>;
|
||||
nvidia,ptp-rx-queue = <3>;
|
||||
nvidia,dma_rx_ring_sz = <4096>;
|
||||
nvidia,dma_tx_ring_sz = <4096>;
|
||||
dma-coherent;
|
||||
};
|
||||
@@ -1,103 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/efuse@1000000/nvidia,tegra264-efuse.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nvidia Tegra t264 efuse Driver
|
||||
|
||||
maintainers:
|
||||
- Suresh Mangipudi
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-efuse is mentioned in the following drivers
|
||||
- <TOP>/kernel/kernel-oot/drivers/nvmem/tegra-efuse.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /bus@0/efuse@1000000
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-efuse
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1000000
|
||||
maximum: 0x1000000
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0x0
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x20000
|
||||
maximum: 0x20000
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0xc8
|
||||
maximum: 0xc8
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- fuse
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
efuse@1000000 {
|
||||
compatible = "nvidia,tegra264-efuse",
|
||||
"nvidia,tegra234-efuse";
|
||||
status = "disabled";
|
||||
reg = <0x0 0x01000000 0x0 0x20000>;
|
||||
clocks = <&bpmp TEGRA264_CLK_FUSE>;
|
||||
clock-names = "fuse";
|
||||
};
|
||||
@@ -1,81 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/nvpmodel/nvidia,nvpmodel.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA nvpmodel clock cap driver
|
||||
|
||||
maintainers:
|
||||
- Yi-Wei Wang
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,nvpmodel is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/nvpmodel/nvpmodel-clk-cap.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /nvpmodel
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,nvpmodel
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
nvidia,bpmp:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
|
||||
clocks:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Clocks are given by a tuple of 2 values:
|
||||
- Phandle to the device
|
||||
- Clock ID
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x122
|
||||
maximum: 0x122
|
||||
|
||||
clock-names:
|
||||
$ref: "/schemas/types.yaml#/definitions/string-array"
|
||||
items:
|
||||
enum:
|
||||
- emc
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
nvpmodel {
|
||||
compatible = "nvidia,nvpmodel";
|
||||
status = "disabled";
|
||||
nvidia,bpmp = <&bpmp>;
|
||||
clocks = <&bpmp TEGRA264_CLK_EMC>;
|
||||
clock-names = "emc";
|
||||
};
|
||||
@@ -1,83 +0,0 @@
|
||||
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/nvpps/nvidia,tegra264-nvpps.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVidia Tegra PPS Driver
|
||||
|
||||
maintainers:
|
||||
- Vijay Mishra
|
||||
|
||||
description: |
|
||||
the compatability = nvidia,tegra264-nvpps is mentioned in the following drivers
|
||||
- <TOP>/kernel/nvidia-oot/drivers/nvpps/nvpps_main.c
|
||||
|
||||
The following nodes use this compatibility
|
||||
- /nvpps
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
items:
|
||||
enum:
|
||||
- nvidia,tegra264-nvpps
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
|
||||
'#address-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
'#size-cells':
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x1
|
||||
maximum: 0x1
|
||||
|
||||
reg:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
|
||||
description: |
|
||||
Registers are given by a tuple of two values:
|
||||
- register address:
|
||||
- register block size.
|
||||
items:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x0
|
||||
maximum: 0xc230000
|
||||
|
||||
primary-emac:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x83
|
||||
maximum: 0x83
|
||||
|
||||
sec-emac:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0x84
|
||||
maximum: 0x84
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
nvpps {
|
||||
};
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user