mirror of
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3067ceeb00
Enable AER reporting for ednpoint. Provide error handler for AER reception and update error code to be read by user space process. Change PCIe link to down. Implement error reporting for runtime eDMA xfer errors. Bug 4088959 Jira NVIPC-334 Change-Id: I74871e5226eab1b708c72aa71216cd160c6ebf68 Signed-off-by: dbadgaiyan <dbadgaiyan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2915753 (cherry picked from commit 7b24941fb486ada70229c42ae1deec12f75028c2) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2921480 Reviewed-by: Arihant Jejani <ajejani@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
164 lines
4.0 KiB
C
164 lines
4.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
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/*
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* Internal to nvscic2c-pcie module. This file is not supposed to be included
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* by any other external modules.
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*/
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#ifndef __MODULE_H__
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#define __MODULE_H__
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#include <linux/completion.h>
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#include <linux/device.h>
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#include <linux/types.h>
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#include <linux/pci-epc.h>
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#include <linux/pci-epf.h>
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#include "common.h"
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/* forward declaration.*/
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struct device_node;
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struct platform_device;
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/*
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* Parameters for the nvscic2c-pcie module and it's endpoints.
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*
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* These are read-only for the rest of the nvscic2c-pcie module.
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*/
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struct driver_param_t {
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/* This is (nvscic2c-pcie) device tree node as found in device tree.*/
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struct device_node *of_node;
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/* driver mode as parsed from compatible string in device-tree.*/
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enum drv_mode_t drv_mode;
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/* nvscic2c-pcie device tree node.*/
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struct platform_device *pdev;
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/* host1x device node and pdev via phandle.*/
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struct device_node *host1x_np;
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struct platform_device *host1x_pdev;
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/* device node of pcie controller via phandle.*/
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struct device_node *edma_np;
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/* pci endpoint device id.*/
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u32 pci_dev_id;
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/* bar window size. - applicable only for epf.*/
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u32 bar_win_size;
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/* node information, Board+SoC Id.*/
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struct node_info_t local_node;
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struct node_info_t peer_node;
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/*
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* Properties that each endpoint shall be configured with.
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* These properties are populated from device tree node.
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*/
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u8 nr_endpoint;
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struct endpoint_prop_t {
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/* Endpoint ID as populated from device tree node. */
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u8 id;
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/*
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* Human readable name of the endpoint - char dev node shall be
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* instanced using this name.
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*/
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char name[NAME_MAX];
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/* Frames and per frame size.*/
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u8 nframes;
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u32 frame_sz;
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} endpoint_props[MAX_ENDPOINTS];
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};
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/* nvscic2c-pcie epf specific context. */
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struct epf_context_t {
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bool notifier_registered;
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struct pci_epf_header header;
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struct pci_epf *epf;
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void *drv_ctx;
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struct work_struct initialization_work;
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struct work_struct deinitialization_work;
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atomic_t core_initialized;
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atomic_t epf_initialized;
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atomic_t shutdown_msg_received;
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wait_queue_head_t core_initialized_waitq;
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};
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/* nvscic2c-pcie epc specific context. */
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struct epc_context_t {
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struct completion epf_ready_cmpl;
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struct completion epf_shutdown_cmpl;
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atomic_t aer_received;
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};
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/*
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* nvscic2c-pcie module context.
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* Contains all the information for all
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* - Configuration parameters per device-tree.
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*/
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struct driver_ctx_t {
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/* driver mode as parsed from compatible string in device-tree.*/
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enum drv_mode_t drv_mode;
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char *drv_name;
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/* the configuration for module and it's endpoints.*/
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struct driver_param_t drv_param;
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/*
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* Visible region to peer SoC for PCIe writes. In nvscic2c-pcie
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* use-cases, it is backed by physical memory allocated for
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* comm-channel, endpoints and stream-objs(mem and sync), etc.
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*
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* Peer's write lands here to be read by local/self.
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*/
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struct dma_buff_t self_mem;
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/*
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* Point to peer's visible region for data-writes. This is a PCIe
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* aperture which allows local/self to write into peer's memory.
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*/
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struct pci_aper_t peer_mem;
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/* pci-client abstraction handle.*/
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void *pci_client_h;
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/* comm-channel abstraction. */
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void *comm_channel_h;
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/* vmap abstraction, this can be moved within endpoints.*/
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void *vmap_h;
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/* tegra-pcie-edma module handle.*/
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void *edma_h;
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/* endpoint absraction handle.*/
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void *endpoints_h;
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/* DRV_MODE specific.*/
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struct epf_context_t *epf_ctx;
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struct epc_context_t *epc_ctx;
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/* peer cpu */
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enum peer_cpu_t peer_cpu;
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/* IOVA alloc abstraction.*/
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struct iova_alloc_domain_t *ivd_h;
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};
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/*
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* Look-up device tree node for the compatible string. Check for the
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* pci-dev-id within the compatible node, if more than one such node found also
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* return error.
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*/
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int
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dt_parse(u32 pci_dev_id, enum drv_mode_t drv_mode,
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struct driver_param_t *drv_param);
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/* Release any memory allocated during dt_parse().*/
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int
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dt_release(struct driver_param_t *drv_param);
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#endif //__MODULE_H__
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