mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
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5535897d3d
Use SPDX license GPL-V2.0 format and change Nvidia copyright year to include 2023. Bug 4078035 Change-Id: I73edd8699dc7298ecb6efc991bc74c1b1e089d0d Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2891236 Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
63 lines
1.8 KiB
C
63 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_TEGRA_ICC_ID_H
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#define _DT_BINDINGS_TEGRA_ICC_ID_H
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/* ICC master node */
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#define TEGRA_ICC_PRIMARY 0
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#define TEGRA_ICC_DEBUG 1
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#define TEGRA_ICC_CPU_CLUSTER0 2
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#define TEGRA_ICC_CPU_CLUSTER1 3
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#define TEGRA_ICC_CPU_CLUSTER2 4
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#define TEGRA_ICC_GPU 5
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#define TEGRA_ICC_CACTMON 6
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#define TEGRA_ICC_DISPLAY 7
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#define TEGRA_ICC_VI 8
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#define TEGRA_ICC_EQOS 9
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#define TEGRA_ICC_PCIE_0 10
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#define TEGRA_ICC_PCIE_1 11
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#define TEGRA_ICC_PCIE_2 12
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#define TEGRA_ICC_PCIE_3 13
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#define TEGRA_ICC_PCIE_4 14
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#define TEGRA_ICC_PCIE_5 15
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#define TEGRA_ICC_PCIE_6 16
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#define TEGRA_ICC_PCIE_7 17
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#define TEGRA_ICC_PCIE_8 18
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#define TEGRA_ICC_PCIE_9 19
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#define TEGRA_ICC_PCIE_10 20
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#define TEGRA_ICC_DLA_0 21
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#define TEGRA_ICC_DLA_1 22
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#define TEGRA_ICC_SDMMC_1 23
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#define TEGRA_ICC_SDMMC_2 24
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#define TEGRA_ICC_SDMMC_3 25
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#define TEGRA_ICC_SDMMC_4 26
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#define TEGRA_ICC_NVDEC 27
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#define TEGRA_ICC_NVENC 28
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#define TEGRA_ICC_NVJPG_0 29
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#define TEGRA_ICC_NVJPG_1 30
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#define TEGRA_ICC_OFAA 31
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#define TEGRA_ICC_XUSB_HOST 32
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#define TEGRA_ICC_XUSB_DEV 33
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#define TEGRA_ICC_TSEC 34
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#define TEGRA_ICC_VIC 35
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#define TEGRA_ICC_APE 36
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#define TEGRA_ICC_APEDMA 37
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#define TEGRA_ICC_SE 38
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#define TEGRA_ICC_ISP 39
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#define TEGRA_ICC_HDA 40
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#define TEGRA_ICC_VIFAL 41
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#define TEGRA_ICC_VI2FAL 42
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#define TEGRA_ICC_VI2 43
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#define TEGRA_ICC_RCE 44
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#define TEGRA_ICC_PVA 45
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#define TEGRA_ICC_NVPMODEL 46
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/* remove later */
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#define NV_NVDISPLAYR2MC_SR_ID TEGRA_ICC_DISPLAY
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#define TEGRA_ICC_MASTER TEGRA_ICC_PRIMARY
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#endif /* _DT_BINDINGS_TEGRA_ICC_ID_H */
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