Mikko Perttunen 250d164381 drm/tegra: nvdec: Fix TRANSCFG register offset ...

NVDEC's TRANSCFG register is at a different offset than VIC.
This becomes a problem now when context isolation is enabled and
the reset value of the register is no longer sufficient.

Bug 3724727

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: Ic83043dcc49a3739fe310cfb5b143b42d9aa259b

2023-04-03 09:18:59 +00:00

..

drm/tegra

drm/tegra: nvdec: Fix TRANSCFG register offset

2023-04-03 09:18:59 +00:00

host1x

host1x: Copy source file from kernel/nvidia to build host1x module

2022-05-25 05:01:42 -07:00

host1x-fence

gpu: host1x-fence: Multiple triggers for pollfd

2023-03-22 18:53:57 -07:00

host1x-nvhost

host1x-nvhost: Copy source file from kernel/nvidia to build host1x-nvhost module

2022-05-25 05:01:46 -07:00

nvgpu

nvgpu: Copy source file from kernel/nvgpu to build nvgpu module

2022-05-28 18:05:29 -07:00

Makefile

gpu: Add host1x-fence driver

2022-07-05 14:30:11 -07:00