mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 17:25:35 +03:00
d5138e1c58
Fix build issues for nvadsp in OOT kernel and enable the build.
- Below files copied from kernel/nvidia/include/linux/
- tegra_nvadsp.h (72af3e78a6aff0fa250e9fd36b8414264d0e4c9a)
- tegra-firmwares.h (700223e52f49f300664dd91335fa11111af733aa)
- tegra-hsp.h (988be8f05033e1d728e046e918b506d829106082)
- Below file copied from kernel/nvidia/include/uapi/misc/
- adsp_console_ioctl.h (72af3e78a6aff0fa250e9fd36b8414264d0e4c9a)
- Functions that needs additional AGIC APIs not supported in upstream
are pushed under macro CONFIG_AGIC_EXT_APIS
- T210 chip_data and references removed
Bug 4164138
Bug 3682950
Change-Id: I5dfb570e578ca3631896de7350cea66698612568
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2971924
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
102 lines
2.4 KiB
C
102 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/**
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* Copyright (c) 2016-2023, NVIDIA CORPORATION. All rights reserved.
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*/
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#ifndef __TEGRA_FIRMWARES_H
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#define __TEGRA_FIRMWARES_H
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/*
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* max size of version string
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*/
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#define TFW_VERSION_MAX_SIZE 256
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#if IS_ENABLED(CONFIG_TEGRA_FIRMWARES_CLASS)
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struct device *tegrafw_register(const char *name,
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const u32 flags,
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ssize_t (*reader)(struct device *dev, char *, size_t),
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const char *string);
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void tegrafw_unregister(struct device *fwdev);
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struct device *devm_tegrafw_register(struct device *dev,
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const char *name,
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const u32 flags,
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ssize_t (*reader)(struct device *dev, char *, size_t),
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const char *string);
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void devm_tegrafw_unregister(struct device *dev, struct device *fwdev);
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void tegrafw_invalidate(struct device *fwdev);
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struct device *devm_tegrafw_register_dt_string(struct device *dev,
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const char *name,
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const char *path,
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const char *property);
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#else
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static inline struct device *tegrafw_register(const char *name,
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const u32 flags,
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ssize_t (*reader)(struct device *, char *, size_t),
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const char *string)
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{
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return ERR_PTR(-ENOTSUPP);
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}
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static inline void tegrafw_unregister(struct device *fwdev)
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{
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}
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static inline void tegrafw_invalidate(struct device *fwdev)
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{
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}
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static inline struct device *devm_tegrafw_register(struct device *dev,
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const char *name,
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const u32 flags,
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ssize_t (*reader)(struct device *dev, char *, size_t),
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const char *string)
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{
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return ERR_PTR(-ENOTSUPP);
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}
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static inline void devm_tegrafw_unregister(struct device *dev,
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struct device *fwdev)
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{
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}
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static inline
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struct device *devm_tegrafw_register_dt_string(struct device *dev,
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const char *name,
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const char *path,
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const char *property)
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{
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return ERR_PTR(-ENOTSUPP);
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}
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#endif /* IS_ENABLED(...) */
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enum {
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TFW_NORMAL = 0x0000,
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TFW_DONT_CACHE = 0x0001,
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TFW_MAX = 0xFFFF,
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};
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static inline struct device *tegrafw_register_string(const char *name,
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const char *string)
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{
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return tegrafw_register(name, TFW_NORMAL, NULL, string);
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}
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static inline struct device *devm_tegrafw_register_string(struct device *dev,
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const char *name,
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const char *string)
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{
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return devm_tegrafw_register(dev, name, TFW_NORMAL, NULL, string);
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}
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static inline struct device *tegrafw_register_dt_string(const char *name,
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const char *path,
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const char *property)
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{
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return devm_tegrafw_register_dt_string(NULL, name, path, property);
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}
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#endif /* __TEGRA_FIRMWARES_CLASS */
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