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3ef3ff7ab8
Add support for the E2614 supermodule on the Tegra194 Galen and Rey platforms. Note that on Galen and Rey, because the 'aud_mclk' is not available on the 40-pin header and the clock available on the 40-pin header, 'extperiph4', cannot generate the frequencies needed for the various sampling rates supported, we use the I2S bit-clock to drive the RT565x codec PLL. Hence, the name of the DAI link for the codec is 'rt565x-codec-sysclk-bclk1' to indicate that we need to configure the codec to use BCLK1 to drive the codec's internal PLL. Bug 2101552 Change-Id: Idd3acb6b3276e5598365ec5e655e75afc3e0bbde Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1670425 Reviewed-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>