Mikko Perttunen c8025c218b gpu: host1x: Wait prefences outside MLOCK ...

The current submission opcode sequence first takes the engine MLOCK,
and then switches to HOST1X class to wait prefences. This is fine
while we only use a single channel per engine and there is no
virtualization, since jobs are serialized on that one channel anyway.
However, when that assumption doesn't hold, we are keeping the
engine locked while not running anything on it while waiting for
prefences to complete.

To resolve this, execute wait commands in the beginning of the job
outside the engine MLOCK. We still take the HOST1X MLOCK because
recent hardware requires register opcodes to be executed within some
MLOCK, but the hardware also allows unlimited channels to take the
HOST1X MLOCK at the same time.

Jira HOSTX-4687

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I783cbc7f1bbd7415fbf0e61163935186b2ba0a44
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2911124
Reviewed-by: Santosh BS <santoshb@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>

2023-05-29 15:08:46 -07:00

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