mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-23 09:42:19 +03:00
b32bd99824
This performs following trivial cleanup:
- Remove explicit THIS_MODULE assignment in platform_driver struct.
- Remove DRV_NAME macro and assign the name directly in platform_driver
struct.
- Add SPDX-License-Identifier to header files
- Sort header file inclusions
Bug 200698314
Change-Id: Ic1e2166b6a8257cd3b462cc8b2a9719e25c7bbb8
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
44 lines
1.5 KiB
C
44 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* tegra210_peq.h - Definitions for Tegra210 PEQ driver
|
|
*
|
|
* Copyright (c) 2014-2021, NVIDIA CORPORATION. All rights reserved.
|
|
*
|
|
*/
|
|
|
|
#ifndef __TEGRA210_PEQ_H__
|
|
#define __TEGRA210_PEQ_H__
|
|
|
|
/* Register offsets from TEGRA210_PEQ*_BASE */
|
|
#define TEGRA210_PEQ_SOFT_RESET 0x0
|
|
#define TEGRA210_PEQ_CG 0x4
|
|
#define TEGRA210_PEQ_STATUS 0x8
|
|
#define TEGRA210_PEQ_CONFIG 0xc
|
|
#define TEGRA210_PEQ_AHUBRAMCTL_CONFIG_RAM_CTRL 0x10
|
|
#define TEGRA210_PEQ_AHUBRAMCTL_CONFIG_RAM_DATA 0x14
|
|
#define TEGRA210_PEQ_AHUBRAMCTL_CONFIG_RAM_SHIFT_CTRL 0x18
|
|
#define TEGRA210_PEQ_AHUBRAMCTL_CONFIG_RAM_SHIFT_DATA 0x1c
|
|
|
|
/* Fields in TEGRA210_PEQ_CONFIG */
|
|
#define TEGRA210_PEQ_CONFIG_BIQUAD_STAGES_SHIFT 2
|
|
#define TEGRA210_PEQ_CONfIG_BIQUAD_STAGES_MASK (0xf << TEGRA210_PEQ_CONFIG_BIQUAD_STAGES_SHIFT)
|
|
#define TEGRA210_PEQ_CONFIG_BIAS_SHIFT 1
|
|
#define TEGRA210_PEQ_CONFIG_BIAS_MASK (0x1 << TEGRA210_PEQ_CONFIG_BIAS_SHIFT)
|
|
#define TEGRA210_PEQ_CONFIG_UNBIAS (1 << TEGRA210_PEQ_CONFIG_BIAS_SHIFT)
|
|
|
|
#define TEGRA210_PEQ_CONFIG_MODE_SHIFT 0
|
|
#define TEGRA210_PEQ_CONFIG_MODE_MASK (0x1 << TEGRA210_PEQ_CONFIG_MODE_SHIFT)
|
|
#define TEGRA210_PEQ_CONFIG_MODE_ACTIVE (1 << TEGRA210_PEQ_CONFIG_MODE_SHIFT)
|
|
|
|
/* PEQ register definition ends here */
|
|
#define TEGRA210_PEQ_MAX_BIQUAD_STAGES 12
|
|
|
|
#define TEGRA210_PEQ_MAX_CHANNELS 8
|
|
|
|
#define TEGRA210_PEQ_GAIN_PARAM_SIZE_PER_CH \
|
|
(2 + TEGRA210_PEQ_MAX_BIQUAD_STAGES * 5)
|
|
#define TEGRA210_PEQ_SHIFT_PARAM_SIZE_PER_CH \
|
|
(2 + TEGRA210_PEQ_MAX_BIQUAD_STAGES)
|
|
|
|
#endif
|