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a4107ebd5d
Currently MCLK rate depends on following DT properties, * 'mclk-fs' : This is a scaling factor depending on which MCLK rate is calculated at runtime [rate = scale * sample_rate]. Different codecs might expect different scale factors and hence DT property is useful here. * 'nvidia,mclk-rate' : This is used to provided fixed rate for MCLK. This overrides scale property, when specified. Since the requirement is either to have fixed or dynamic rate for MCLK, this can be managed with single property like below. * Use 'assigned-clocks' and 'assigned-clock-parents' to specify parent clock for MCLK. * Use preferred rate during initialization with 'assigned-clock-rates' DT binding. This can be the required fixed rate as well. * If dynamic scaling is required, then use 'mclk-fs' property. Otherwise system uses fixed rate. Since rt565x audio codecs expect scaling factor of 256, all platforms which use such codecs must be populated with "mclk-fs" property. This is taken care in other patches in the series. Bug 200542485 Bug 200516191 Bug 200503387 Change-Id: I1fc31626929bab9d4707d2a1b74c8f1749412ea4 Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2173560 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com> Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-by: Mohan Kumar D <mkumard@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
80 lines
2.3 KiB
C
80 lines
2.3 KiB
C
/*
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* tegra_alt_asoc_utils.h - Definitions for MCLK and DAP Utility driver
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*
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* Author: Stephen Warren <swarren@nvidia.com>
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* Copyright (c) 2011-2019 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __TEGRA_ASOC_UTILS_ALT_H_
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#define __TEGRA_ASOC_UTILS_ALT_H_
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struct clk;
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struct device;
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enum tegra_asoc_utils_soc {
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TEGRA_ASOC_UTILS_SOC_TEGRA210,
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TEGRA_ASOC_UTILS_SOC_TEGRA186,
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TEGRA_ASOC_UTILS_SOC_TEGRA194,
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};
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/*
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* Maintain same order in DT entry
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* FIXME: (This would be removed going ahead)
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*/
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enum tegra_asoc_utils_clkrate {
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PLLA_x11025_RATE,
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AUD_MCLK_x11025_RATE,
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PLLA_OUT0_x11025_RATE,
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AHUB_x11025_RATE,
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PLLA_x8000_RATE,
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AUD_MCLK_x8000_RATE,
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PLLA_OUT0_x8000_RATE,
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AHUB_x8000_RATE,
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MAX_NUM_RATES,
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};
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struct tegra_asoc_audio_clock_info {
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struct device *dev;
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struct snd_soc_card *card;
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enum tegra_asoc_utils_soc soc;
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struct clk *clk_pll_base;
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struct clk *clk_pll_out;
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struct clk *clk_aud_mclk;
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struct clk *clk_ahub;
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struct reset_control *clk_cdev1_rst;
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unsigned int *pll_base_rate;
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u32 set_pll_base_rate;
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u32 set_pll_out_rate;
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u32 set_aud_mclk_rate;
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u32 mclk_scale;
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/* FIXME: below would be removed going ahead */
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u32 clk_rates[MAX_NUM_RATES];
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u32 num_clk;
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};
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int tegra_alt_asoc_utils_set_rate(struct tegra_asoc_audio_clock_info *data,
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unsigned int srate, unsigned int mclk,
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unsigned int clk_out_rate);
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int tegra_alt_asoc_utils_init(struct tegra_asoc_audio_clock_info *data,
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struct device *dev, struct snd_soc_card *card);
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int tegra_alt_asoc_utils_clk_enable(struct tegra_asoc_audio_clock_info *data);
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int tegra_alt_asoc_utils_clk_disable(struct tegra_asoc_audio_clock_info *data);
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#endif
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