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a4607dbdfd
Add additional HW SEQ validation checks - Validate all frames with different addressing modes in a HW SEQ blob - Validate multiple frames on a single channel in RDF frame-linking mode - Validate each column/row within a given frame since multiple column/rows are supported in next chip Bug 4588239 Signed-off-by: Amruta Bhamidipati<abhamidipati@nvidia.com> Change-Id: Ic30c8c1982c5ac21a960f0546c39e5a28cc7d4bd Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3153297 GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Tested-by: Amruta Sai Anusha Bhamidipati <abhamidipati@nvidia.com> Reviewed-by: Krish Agarwal <krisha@nvidia.com> Reviewed-by: Sreehari Mohan <sreeharim@nvidia.com> Reviewed-by: Omar Nemri <onemri@nvidia.com>