Amruta Bhamidipati a4607dbdfd drivers: pva: Update HWSEQ checks
Add additional HW SEQ validation checks
- Validate all frames with different addressing modes in a
  HW SEQ blob
- Validate multiple frames on a single channel in RDF
  frame-linking mode
- Validate each column/row within a given frame since
  multiple column/rows are supported in next chip

Bug 4588239

Signed-off-by: Amruta Bhamidipati<abhamidipati@nvidia.com>

Change-Id: Ic30c8c1982c5ac21a960f0546c39e5a28cc7d4bd
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3153297
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: Amruta Sai Anusha Bhamidipati <abhamidipati@nvidia.com>
Reviewed-by: Krish Agarwal <krisha@nvidia.com>
Reviewed-by: Sreehari Mohan <sreeharim@nvidia.com>
Reviewed-by: Omar Nemri <onemri@nvidia.com>
2024-06-21 23:05:14 -07:00
2024-06-21 23:05:14 -07:00
2024-05-21 16:36:31 -07:00
2022-12-07 23:57:14 -08:00
2024-02-24 05:24:07 -08:00
Description
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34 MiB