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e2a1904d46
ADSP host driver is enhanced to be multi-instance
capable and reentrant:
- Trailing unique identifier string in compatible DT property, like
"adsp", "adsp1" or "aon", is used to identify the driver instances
- Each probed driver instance is inserted into a global list, from
which the handle can be fetched using 'nvadsp_get_handle' API
(passing the above unique identifier as argument)
- Above unique identifier is also used as name for the DBFS
directory (containing files like adsp_console, adsp_logger, etc.)
- 'nvadsp_get_handle' is the only exported API; all other APIs are
accessible via function pointers within 'struct nvadsp_handle'
- APIs above maintain one-is-to-one correspondence with all
legacy APIs, with the addition of a new argument
'struct nvadsp_handle *' at the beginning
- Legacy APIs continue to be supported, but they are hardwired to
work only if the kernel probes just one driver instance
- All driver files are cleaned up to not use any global state
variables (necessary for reentrancy)
Bug 3682950
Change-Id: Id5db49e861b2f81716ae8352b36b406654da2bbd
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3092701
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
102 lines
2.4 KiB
C
102 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/**
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* Copyright (c) 2015-2024, NVIDIA CORPORATION. All rights reserved.
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*/
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#include <linux/version.h>
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#include <soc/tegra/fuse.h>
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#include <soc/tegra/virt/hv-ivc.h>
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#include <linux/platform_device.h>
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#include <linux/tegra_nvadsp.h>
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#include <linux/tegra-hsp.h>
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#include "dev.h"
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#include "hwmailbox.h"
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#include "os.h"
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#include "dev-t18x.h"
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#if IS_ENABLED(CONFIG_TEGRA_HSP)
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static void nvadsp_dbell_handler(void *data)
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{
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struct platform_device *pdev = data;
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struct device *dev = &pdev->dev;
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dev_info(dev, "APE DBELL handler\n");
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}
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#endif
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/* Function to return the ADMA page number (0 indexed) used by guest */
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static int tegra_adma_query_dma_page(void)
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{
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struct device_node *np = NULL;
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int adma_page = 0, ret = 0, i = 0;
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static const char *compatible[] = {
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"nvidia,tegra210-adma",
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"nvidia,tegra210-adma-hv",
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"nvidia,tegra186-adma",
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"nvidia,tegra194-adma-hv",
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};
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for (i = 0; i < ARRAY_SIZE(compatible); i++) {
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np = of_find_compatible_node(NULL, NULL, compatible[i]);
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if (np == NULL)
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continue;
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/*
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* In DT, "adma-page" property is 1 indexed
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* If property is present, update return value to be 0 indexed
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* If property is absent, return default value as page 0
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*/
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ret = of_property_read_u32(np, "adma-page", &adma_page);
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if (ret == 0)
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adma_page = adma_page - 1;
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break;
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}
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pr_info("%s: adma-page %d\n", __func__, adma_page);
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return adma_page;
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}
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int nvadsp_os_t18x_init(struct platform_device *pdev)
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{
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struct nvadsp_drv_data *drv_data = platform_get_drvdata(pdev);
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int ret = 0, adma_ch_page, val = 0;
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if (is_tegra_hypervisor_mode()) {
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adma_ch_page = tegra_adma_query_dma_page();
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/* Set ADSP to do decompression again */
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val = ADSP_CONFIG_DECOMPRESS_EN << ADSP_CONFIG_DECOMPRESS_SHIFT;
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/* Set ADSP to know its virtualized configuration */
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val = val | (ADSP_CONFIG_VIRT_EN << ADSP_CONFIG_VIRT_SHIFT);
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/* Encode DMA Page Bits with DMA page information */
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val = val | (adma_ch_page << ADSP_CONFIG_DMA_PAGE_SHIFT);
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/* Write to HWMBOX5 */
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hwmbox_writel(drv_data, val,
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drv_data->chip_data->adsp_os_config_hwmbox);
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/* Clear HWMBOX0 for ADSP Guest reset handling */
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hwmbox_writel(drv_data, 0,
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drv_data->chip_data->hwmb.hwmbox0_reg);
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return 0;
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}
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#if IS_ENABLED(CONFIG_TEGRA_HSP)
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ret = tegra_hsp_db_add_handler(HSP_MASTER_APE,
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nvadsp_dbell_handler, pdev);
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if (ret)
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dev_err(&pdev->dev,
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"failed to add HSP_MASTER_APE DB handler\n");
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#endif
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return ret;
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}
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