mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
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b32bd99824
This performs following trivial cleanup:
- Remove explicit THIS_MODULE assignment in platform_driver struct.
- Remove DRV_NAME macro and assign the name directly in platform_driver
struct.
- Add SPDX-License-Identifier to header files
- Sort header file inclusions
Bug 200698314
Change-Id: Ic1e2166b6a8257cd3b462cc8b2a9719e25c7bbb8
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
74 lines
2.5 KiB
C
74 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* tegra210_iqc.h - Definitions for Tegra210 IQC driver
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*
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* Copyright (c) 2014-2021 NVIDIA CORPORATION. All rights reserved.
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*
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*/
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#ifndef __TEGRA210_IQC_H__
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#define __TEGRA210_IQC_H__
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#define TEGRA210_IQC_AXBAR_TX_STRIDE 0x04
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/* Register offsets from TEGRA210_IQC*_BASE */
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/*
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* IQC_AXBAR_TX registers are with respect to AXBAR.
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* The data is coming from IQC for record.
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*/
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#define TEGRA210_IQC_AXBAR_TX_STATUS 0x0c
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#define TEGRA210_IQC_AXBAR_TX_INT_STATUS 0x10
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#define TEGRA210_IQC_AXBAR_TX_INT_MASK 0x14
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#define TEGRA210_IQC_AXBAR_TX_INT_SET 0x18
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#define TEGRA210_IQC_AXBAR_TX_INT_CLEAR 0x1c
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#define TEGRA210_IQC_AXBAR_TX_CIF_CTRL 0x20
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#define TEGRA210_IQC_ENABLE 0x80
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#define TEGRA210_IQC_SOFT_RESET 0x84
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#define TEGRA210_IQC_CG 0x88
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#define TEGRA210_IQC_STATUS 0x8c
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#define TEGRA210_IQC_INT_STATUS 0x90
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#define TEGRA210_IQC_CTRL 0xa0
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#define TEGRA210_IQC_TIME_STAMP_STATUS_0 0xa4
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#define TEGRA210_IQC_TIME_STAMP_STATUS_1 0xa8
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#define TEGRA210_IQC_WS_EDGE_STATUS 0xac
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#define TEGRA210_IQC_CYA 0xb0
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/* Fields in TEGRA210_IQC_ENABLE */
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#define TEGRA210_IQC_EN_SHIFT 0
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#define TEGRA210_IQC_EN_MASK (1 << TEGRA210_IQC_EN_SHIFT)
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#define TEGRA210_IQC_EN (1 << TEGRA210_IQC_EN_SHIFT)
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/* Fields in TEGRA210_IQC_CTRL */
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#define TEGRA210_IQC_CTRL_EDGE_CTRL_SHIFT 4
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#define TEGRA210_IQC_CTRL_EDGE_CTRL_MASK (1 << TEGRA210_IQC_CTRL_EDGE_CTRL_SHIFT)
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#define TEGRA210_IQC_CTRL_EDGE_CTRL_NEG_EDGE (1 << TEGRA210_IQC_CTRL_EDGE_CTRL_SHIFT)
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#define TEGRA210_IQC_TIMESTAMP_SHIFT 5
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#define TEGRA210_IQC_TIMESTAMP_MASK (1 << TEGRA210_IQC_TIMESTAMP_SHIFT)
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#define TEGRA210_IQC_TIMESTAMP_EN (1 << TEGRA210_IQC_TIMESTAMP_SHIFT)
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#define TEGRA210_IQC_WORD_SIZE_SHIFT 8
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#define TEGRA210_IQC_WORD_SIZE_MASK (0xf << TEGRA210_IQC_WORD_SIZE_SHIFT)
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#define TEGRA210_IQC_WS_POLARITY_SHIFT 12
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#define TEGRA210_IQC_WS_POLARITY_MASK (1 << TEGRA210_IQC_WS_POLARITY_SHIFT)
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#define TEGRA210_IQC_WS_POLARITY_HIGH (1 << TEGRA210_IQC_WS_POLARITY_SHIFT)
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#define TEGRA210_IQC_BIT_ORDER_SHIFT 16
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#define TEGRA210_IQC_BIT_ORDER_MASK (1 << TEGRA210_IQC_BIT_ORDER_SHIFT)
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#define TEGRA210_IQC_LSB_FIRST (1 << TEGRA210_IQC_BIT_ORDER_SHIFT)
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#define TEGRA210_IQC_DATA_OFFSET_SHIFT 0
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#define TEGRA210_IQC_DATA_OFFSET_MASK (7 << TEGRA210_IQC_DATA_OFFSET_SHIFT)
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struct tegra210_iqc {
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struct clk *clk_iqc;
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struct regmap *regmap;
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unsigned int timestamp_enable;
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unsigned int data_offset;
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};
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#endif
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