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Tegra124 introduces some small changes to the layout of some registers. Modify the affected drivers to program those registers appropriately based on which SoC they're running on. Tegra124 also introduced some new modules on the AHUB configlink register bus. These will require new entries in configlink_clocks[] in the AHUB driver. However, supporting that change likely relies on switching Tegra to the common reset framework, so I'll defer that change for now. Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com> Based-on-work-by: Songhee Baek <sbaek@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>