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gpu: gp10b: add gfxp_wfi_timeout sysfs node

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Add a sysfs node to allow root user to set PRI_FE_GFXP_WFI_TIMEOUT, for gp10b
only, in units of sysclk cycles. Store the set value in a variable, and write
the set value to register after GPU is un-railgated.

NV_PGRAPH_PRI_FE_GFXP_WFI_TIMEOUT is engine_reset after Bug 1623341.

Change default value to be specified in cycles, rather than time.  This value
is almost the current value in cycles calculated each boot.

Bug 1932782

Change-Id: I0a4207e637cd1413a1be95abe2bcce3adccf76fa
Reviewed-on: https://git-master.nvidia.com/r/1540939
Signed-off-by: Jonathan McCaffrey <jmccaffrey@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1580999
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Jonathan McCaffrey
2017-08-17 23:51:03 -07:00
committed by mobile promotions
parent e49d93a960
commit 00e52529a8
4 changed files with 54 additions and 7 deletions
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3
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
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@@ -78,6 +78,7 @@
#define CTXSW_MEM_SCRUBBING_TIMEOUT_DEFAULT 10
#define FECS_ARB_CMD_TIMEOUT_MAX 40
#define FECS_ARB_CMD_TIMEOUT_DEFAULT 2
#define GFXP_WFI_TIMEOUT_COUNT_DEFAULT 100000
static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g);
@@ -4841,6 +4842,8 @@ static int gk20a_init_gr_setup_sw(struct gk20a *g)
if (g->ops.gr.init_czf_bypass)
g->ops.gr.init_czf_bypass(g);
gr->gfxp_wfi_timeout_count = GFXP_WFI_TIMEOUT_COUNT_DEFAULT;
nvgpu_mutex_init(&gr->ctx_mutex);
nvgpu_spinlock_init(&gr->ch_tlb_lock);