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gpu: nvgpu: add coherent case in gp10b_get_pde0_pgsz

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gp10b_get_pde0_pgsz computes pgsz depending on aperture and
address, but it was not handling sysmem coherent case.

Bug 2082475

Change-Id: I095acb05e3f917518368b879f5839f8e9dbcd8ea
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1676255
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2018-03-14 17:54:56 -07:00
committed by mobile promotions
parent 69252b3fb6
commit 0378bc32e4
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/nvgpu/gp10b/mm_gp10b.c
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@@ -352,6 +352,7 @@ static enum gmmu_pgsz_gk20a gp10b_get_pde0_pgsz(struct gk20a *g,
* Check if the aperture AND address are set
*/
if (pde_v[2] & (gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f() |
gmmu_new_dual_pde_aperture_small_sys_mem_coh_f() |
gmmu_new_dual_pde_aperture_small_video_memory_f())) {
u64 addr = (((u64) pde_v[3] << 32) | (u64) (pde_v[2] &
gmmu_new_dual_pde_address_small_sys_f(~0))) <<
@@ -362,6 +363,7 @@ static enum gmmu_pgsz_gk20a gp10b_get_pde0_pgsz(struct gk20a *g,
}
if (pde_v[0] & (gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f() |
gmmu_new_dual_pde_aperture_big_sys_mem_coh_f() |
gmmu_new_dual_pde_aperture_big_video_memory_f())) {
u64 addr = (((u64) pde_v[1] << 32) | (u64) (pde_v[0] &
gmmu_new_dual_pde_address_big_sys_f(~0))) <<