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gpu: nvgpu: MISRA 10.3 Conversions to/from char

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MISRA Rule 10.3 states that the value of an expression shall not be
assigned to an object with a narrower essential type or of a
different essential type category.

We have cases where we are converting to/from char and non char types
and this fix 10.3 violations resulting from these conversions.

This also fix violations in conversions between s8 and non-s8 types
as s8 can be typedefed as char.

Jira NVGPU-1010

Change-Id: I150dd633eb7575de9ea2bedd598b7af74d1fcbd9
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1801613
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sai Nikhil
2018-08-21 12:18:10 +05:30
committed by mobile promotions
parent 9f5a464d28
commit 05f45bcfc3
4 changed files with 20 additions and 16 deletions
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6
drivers/gpu/nvgpu/clk/clk_vin.c
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@@ -102,8 +102,8 @@ u32 clk_avfs_get_vin_cal_fuse_v20(struct gk20a *g,
if (pvinobjs->calibration_rev_vbios == g->ops.fuse.read_vin_cal_fuse_rev(g)) {
BOARDOBJGRP_FOR_EACH(&(pvinobjs->super.super),
struct vin_device_v20 *, pvindev, i) {
gain = 0;
offset = 0;
gain = '\0';
offset = '\0';
pvindev = (struct vin_device_v20 *)CLK_GET_VIN_DEVICE(pvinobjs, i);
status = g->ops.fuse.read_vin_cal_gain_offset_fuse(g,
pvindev->super.id, &gain, &offset);
@@ -268,7 +268,7 @@ static u32 devinit_get_vin_device_table(struct gk20a *g,
u8 *vin_tbl_entry_ptr = NULL;
u32 index = 0;
u32 slope=0, intercept=0;
s8 offset=0, gain=0;
s8 offset='\0', gain='\0';
struct vin_device *pvin_dev;
u32 cal_type;