nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 09:12:24 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: runlist: init engine info of runlist for VF

Browse Source 
- init engine info for VF which is needed to setup ramfc
- avoid register access in nvgpu_runlist_get_device_id. It could use
rleng_id.
- alloc physical addressed memory for vf runlist mem.

Jira GVSCI-15773

Change-Id: I63494b306a2f56d090a61ea1fa581083224d1cb6
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2863432
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Richard Zhao
2023-01-25 10:06:15 -08:00
committed by mobile promotions
parent 64e22ee54b
commit 067e3590d5
1 changed files with 8 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/gpu/nvgpu/common/fifo/runlist.c
View File

@@ -1086,7 +1086,7 @@ void nvgpu_runlist_init_enginfo(struct gk20a *g, struct nvgpu_fifo *f)
nvgpu_log_fn(g, " ");
if (g->is_virtual) {
if (nvgpu_is_legacy_vgpu(g)) {
return;
}
@@ -1122,8 +1122,10 @@ void nvgpu_runlist_init_enginfo(struct gk20a *g, struct nvgpu_fifo *f)
&runlist->pbdma_bitmask);
}
else {
runlist->pbdma_bitmask =
nvgpu_runlist_get_pbdma_mask(g, runlist);
if (!nvgpu_is_vf(g)) {
runlist->pbdma_bitmask =
nvgpu_runlist_get_pbdma_mask(g, runlist);
}
}
nvgpu_log(g, gpu_dbg_info, " Active engine bitmask: 0x%x", runlist->eng_bitmask);
nvgpu_log(g, gpu_dbg_info, " PBDMA bitmask: 0x%x", runlist->pbdma_bitmask);
@@ -1142,7 +1144,7 @@ static struct nvgpu_runlist_mem *init_rl_mem(struct gk20a *g, u32 runlist_size)
}
err = nvgpu_dma_alloc_flags_sys(g,
g->is_virtual ?
nvgpu_is_legacy_vgpu(g) ?
0ULL : NVGPU_DMA_PHYSICALLY_ADDRESSED,
runlist_size,
&mem->mem);
@@ -1457,10 +1459,9 @@ exit:
s32 nvgpu_runlist_get_device_id(struct gk20a *g, struct nvgpu_runlist *rl, u32 *device_id)
{
s32 err = 0;
u32 rleng_id = 0;
if (g->ops.runlist.get_engine_id_from_rleng_id != NULL) {
*device_id = g->ops.runlist.get_engine_id_from_rleng_id(g, rleng_id, rl->runlist_pri_base);
if (rl->rl_dev_list[0] != NULL) {
*device_id = rl->rl_dev_list[0]->engine_id;
} else {
err = (s32)(-EINVAL);
nvgpu_err(g, "Get device ID failed:");