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gpu: nvgpu: remove dgpu hal and sw from the safety build

Browse Source 
Since dGPU support is not required for initial safety release, compile
out dGPU sw and hal implementations except below files that are used
by gv11b currently: acr_sw_gv100.c, engine_status_gv100.c, gr_gv100.c
gr_config_gv100.c and hwpm_map_gv100.c.

JIRA NVGPU-3062

Change-Id: I8a6bc8b235e7e5eac5b0e76147b8bd12f9abbd2d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2119586
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-05-15 21:34:11 +05:30
committed by mobile promotions
parent 17607e6bc9
commit 08add88e1d
6 changed files with 81 additions and 61 deletions
Download Patch File Download Diff File Expand all files Collapse all files

118
drivers/gpu/nvgpu/Makefile.sources
View File

@@ -99,13 +99,9 @@ srcs += common/sim/sim.c \
common/ce/ce.c \
common/vbios/bios.c \
common/vbios/bios_sw_gp106.c \
common/vbios/bios_sw_gv100.c \
common/vbios/bios_sw_tu104.c \
common/falcon/falcon.c \
common/falcon/falcon_sw_gk20a.c \
common/falcon/falcon_sw_gp106.c \
common/falcon/falcon_sw_gv100.c \
common/falcon/falcon_sw_tu104.c \
common/engine_queues/engine_mem_queue.c \
common/engine_queues/engine_dmem_queue.c \
common/engine_queues/engine_fb_queue.c \
@@ -154,7 +150,6 @@ srcs += common/sim/sim.c \
common/acr/acr_sw_gp10b.c \
common/acr/acr_sw_gv100.c \
common/acr/acr_sw_gv11b.c \
common/acr/acr_sw_tu104.c \
common/ptimer/ptimer.c \
common/worker.c \
common/sync/channel_sync.c \
@@ -185,8 +180,6 @@ srcs += common/sim/sim.c \
common/pmu/lsfm/lsfm.c \
common/pmu/lsfm/lsfm_sw_gm20b.c \
common/pmu/lsfm/lsfm_sw_gp10b.c \
common/pmu/lsfm/lsfm_sw_gv100.c \
common/pmu/lsfm/lsfm_sw_tu104.c \
common/pmu/pmu_pstate.c \
common/pmu/volt/volt_dev.c \
common/pmu/volt/volt_pmu.c \
@@ -207,7 +200,6 @@ srcs += common/sim/sim.c \
common/pmu/perf/pmu_perf.c \
common/pmu/perf/vfe_equ.c \
common/pmu/perf/vfe_var.c \
common/pmu/perf/perf_gv100.c \
common/pmu/perf/perf_ps35.c \
common/pmu/perf/perf_pstate.c \
common/pmu/perf/change_seq.c \
@@ -225,14 +217,11 @@ srcs += common/sim/sim.c \
common/pmu/boardobj/boardobjgrp_e32.c \
common/clk_arb/clk_arb.c \
common/clk_arb/clk_arb_gp10b.c \
common/clk_arb/clk_arb_gv100.c \
common/fence/fence.c \
hal/mm/mm_gk20a.c \
hal/mm/mm_gm20b.c \
hal/mm/mm_gp10b.c \
hal/mm/mm_gv11b.c \
hal/mm/mm_gv100.c \
hal/mm/mm_tu104.c \
hal/mm/cache/flush_gk20a.c \
hal/mm/cache/flush_gv11b.c \
hal/mm/mmu_fault/mmu_fault_gv11b.c \
@@ -243,22 +232,15 @@ srcs += common/sim/sim.c \
hal/mc/mc_gm20b.c \
hal/mc/mc_gp10b.c \
hal/mc/mc_gv11b.c \
hal/mc/mc_gv100.c \
hal/mc/mc_tu104.c \
hal/bus/bus_gk20a.c \
hal/bus/bus_gm20b.c \
hal/bus/bus_gp10b.c \
hal/bus/bus_gv100.c \
hal/bus/bus_tu104.c \
hal/class/class_gm20b.c \
hal/class/class_gp10b.c \
hal/class/class_gv11b.c \
hal/class/class_tu104.c \
hal/clk/clk_gm20b.c \
hal/clk/clk_gv100.c \
hal/gr/ecc/ecc_gp10b.c \
hal/gr/ecc/ecc_gv11b.c \
hal/gr/ecc/ecc_tu104.c \
hal/gr/zcull/zcull_gm20b.c \
hal/gr/zcull/zcull_gv11b.c \
hal/gr/ctxsw_prog/ctxsw_prog_gm20b.c \
@@ -266,13 +248,10 @@ srcs += common/sim/sim.c \
hal/gr/ctxsw_prog/ctxsw_prog_gv11b.c \
hal/gr/init/gr_init_gm20b.c \
hal/gr/init/gr_init_gp10b.c \
hal/gr/init/gr_init_gv100.c \
hal/gr/init/gr_init_gv11b.c \
hal/gr/init/gr_init_tu104.c \
hal/gr/intr/gr_intr_gm20b.c \
hal/gr/intr/gr_intr_gp10b.c \
hal/gr/intr/gr_intr_gv11b.c \
hal/gr/intr/gr_intr_tu104.c \
hal/gr/hwpm_map/hwpm_map_gv100.c \
hal/gr/falcon/gr_falcon_gm20b.c \
hal/gr/falcon/gr_falcon_gp10b.c \
@@ -285,18 +264,12 @@ srcs += common/sim/sim.c \
hal/gr/gr/gr_gp10b.c \
hal/gr/gr/gr_gv100.c \
hal/gr/gr/gr_gv11b.c \
hal/gr/gr/gr_tu104.c \
hal/fbpa/fbpa_tu104.c \
hal/init/hal_gm20b.c \
hal/init/hal_gm20b_litter.c \
hal/init/hal_gp10b.c \
hal/init/hal_gp10b_litter.c \
hal/init/hal_gv100.c \
hal/init/hal_gv100_litter.c \
hal/init/hal_gv11b.c \
hal/init/hal_gv11b_litter.c \
hal/init/hal_tu104.c \
hal/init/hal_tu104_litter.c \
hal/init/hal_init.c \
hal/perf/perf_gm20b.c \
hal/perf/perf_gv11b.c \
@@ -306,18 +279,13 @@ srcs += common/sim/sim.c \
hal/power_features/cg/gp10b_gating_reglist.c \
hal/power_features/cg/gv11b_gating_reglist.c \
hal/power_features/cg/gp106_gating_reglist.c \
hal/power_features/cg/gv100_gating_reglist.c \
hal/power_features/cg/tu104_gating_reglist.c \
hal/cbc/cbc_gm20b.c \
hal/cbc/cbc_gp10b.c \
hal/cbc/cbc_gv11b.c \
hal/cbc/cbc_tu104.c \
hal/ptimer/ptimer_gk20a.c \
hal/regops/regops_gm20b.c \
hal/regops/regops_gp10b.c \
hal/regops/regops_gv100.c \
hal/regops/regops_gv11b.c \
hal/regops/regops_tu104.c \
hal/ce/ce2_gk20a.c \
hal/ce/ce_gp10b.c \
hal/ce/ce_gv11b.c \
@@ -328,71 +296,54 @@ srcs += common/sim/sim.c \
hal/ltc/ltc_gm20b.c \
hal/ltc/ltc_gp10b.c \
hal/ltc/ltc_gv11b.c \
hal/ltc/ltc_tu104.c \
hal/ltc/intr/ltc_intr_gm20b.c \
hal/ltc/intr/ltc_intr_gp10b.c \
hal/ltc/intr/ltc_intr_gv11b.c \
hal/fb/fb_gm20b.c \
hal/fb/fb_gp10b.c \
hal/fb/fb_gp106.c \
hal/fb/fb_gv100.c \
hal/fb/fb_gv11b.c \
hal/fb/fb_tu104.c \
hal/fb/fb_mmu_fault_gv11b.c \
hal/fb/fb_mmu_fault_tu104.c \
hal/fb/intr/fb_intr_gv100.c \
hal/fb/intr/fb_intr_gv11b.c \
hal/fb/intr/fb_intr_tu104.c \
hal/fb/intr/fb_intr_ecc_gv11b.c \
hal/fuse/fuse_gm20b.c \
hal/fuse/fuse_gp10b.c \
hal/fuse/fuse_gp106.c \
hal/func/func_tu104.c \
hal/rc/rc_gk20a.c \
hal/rc/rc_gv11b.c \
hal/fifo/fifo_gk20a.c \
hal/fifo/fifo_gv11b.c \
hal/fifo/fifo_tu104.c \
hal/fifo/preempt_gk20a.c \
hal/fifo/preempt_gv11b.c \
hal/fifo/usermode_gv11b.c \
hal/fifo/usermode_tu104.c \
hal/fifo/engines_gm20b.c \
hal/fifo/engines_gp10b.c \
hal/fifo/engines_gv11b.c \
hal/fifo/pbdma_gm20b.c \
hal/fifo/pbdma_gp10b.c \
hal/fifo/pbdma_gv11b.c \
hal/fifo/pbdma_tu104.c \
hal/fifo/engine_status_gm20b.c \
hal/fifo/engine_status_gv100.c \
hal/fifo/pbdma_status_gm20b.c \
hal/fifo/ramfc_gk20a.c \
hal/fifo/ramfc_gp10b.c \
hal/fifo/ramfc_gv11b.c \
hal/fifo/ramfc_tu104.c \
hal/fifo/ramin_gk20a.c \
hal/fifo/ramin_gm20b.c \
hal/fifo/ramin_gp10b.c \
hal/fifo/ramin_gv11b.c \
hal/fifo/ramin_tu104.c \
hal/fifo/runlist_ram_gk20a.c \
hal/fifo/runlist_ram_gv11b.c \
hal/fifo/runlist_ram_tu104.c \
hal/fifo/runlist_fifo_gk20a.c \
hal/fifo/runlist_fifo_gv11b.c \
hal/fifo/runlist_fifo_gv100.c \
hal/fifo/runlist_fifo_tu104.c \
hal/fifo/channel_gk20a.c \
hal/fifo/channel_gm20b.c \
hal/fifo/channel_gv11b.c \
hal/fifo/channel_gv100.c \
hal/fifo/tsg_gk20a.c \
hal/fifo/tsg_gv11b.c \
hal/fifo/userd_gk20a.c \
hal/fifo/userd_gv11b.c \
hal/fifo/fifo_intr_gk20a.c \
hal/fifo/fifo_intr_gv100.c \
hal/fifo/fifo_intr_gv11b.c \
hal/fifo/mmu_fault_gk20a.c \
hal/fifo/mmu_fault_gm20b.c \
@@ -402,12 +353,8 @@ srcs += common/sim/sim.c \
hal/falcon/falcon_gk20a.c \
hal/netlist/netlist_gm20b.c \
hal/netlist/netlist_gp10b.c \
hal/netlist/netlist_gv100.c \
hal/netlist/netlist_gv11b.c \
hal/netlist/netlist_tu104.c \
hal/nvdec/nvdec_gp106.c \
hal/nvdec/nvdec_tu104.c \
hal/gsp/gsp_gv100.c \
hal/sync/sema_cmdbuf_gk20a.c \
hal/sync/sema_cmdbuf_gv11b.c \
hal/sync/syncpt_cmdbuf_gk20a.c \
@@ -417,16 +364,11 @@ srcs += common/sim/sim.c \
hal/pmu/pmu_gp10b.c \
hal/pmu/pmu_gp106.c \
hal/pmu/pmu_gv11b.c \
hal/pmu/pmu_tu104.c \
hal/pramin/pramin_gp10b.c \
hal/pramin/pramin_gv100.c \
hal/pramin/pramin_init.c \
hal/pramin/pramin_tu104.c \
hal/bios/bios_tu104.c \
hal/top/top_gm20b.c \
hal/top/top_gp10b.c \
hal/top/top_gp106.c \
hal/top/top_gv100.c \
hal/top/top_gv11b.c
ifeq ($(NVGPU_DEBUGGER),1)
@@ -516,6 +458,64 @@ srcs += common/engine_queues/engine_emem_queue.c \
common/sec2/ipc/sec2_msg.c \
common/sec2/ipc/sec2_queue.c \
common/sec2/ipc/sec2_seq.c \
common/vbios/bios_sw_gv100.c \
common/vbios/bios_sw_tu104.c \
common/falcon/falcon_sw_gv100.c \
common/falcon/falcon_sw_tu104.c \
common/acr/acr_sw_tu104.c \
common/pmu/lsfm/lsfm_sw_gv100.c \
common/pmu/lsfm/lsfm_sw_tu104.c \
common/pmu/perf/perf_gv100.c \
common/clk_arb/clk_arb_gv100.c \
hal/mm/mm_gv100.c \
hal/mm/mm_tu104.c \
hal/mc/mc_gv100.c \
hal/mc/mc_tu104.c \
hal/bus/bus_gv100.c \
hal/bus/bus_tu104.c \
hal/class/class_tu104.c \
hal/clk/clk_gv100.c \
hal/gr/ecc/ecc_tu104.c \
hal/gr/init/gr_init_gv100.c \
hal/gr/init/gr_init_tu104.c \
hal/gr/intr/gr_intr_tu104.c \
hal/gr/gr/gr_tu104.c \
hal/fbpa/fbpa_tu104.c \
hal/init/hal_gv100.c \
hal/init/hal_gv100_litter.c \
hal/init/hal_tu104.c \
hal/init/hal_tu104_litter.c \
hal/power_features/cg/gv100_gating_reglist.c \
hal/power_features/cg/tu104_gating_reglist.c \
hal/cbc/cbc_tu104.c \
hal/regops/regops_gv100.c \
hal/regops/regops_tu104.c \
hal/ltc/ltc_tu104.c \
hal/fb/fb_gv100.c \
hal/fb/fb_tu104.c \
hal/fb/fb_mmu_fault_tu104.c \
hal/fb/intr/fb_intr_gv100.c \
hal/fb/intr/fb_intr_tu104.c \
hal/func/func_tu104.c \
hal/fifo/fifo_tu104.c \
hal/fifo/usermode_tu104.c \
hal/fifo/pbdma_tu104.c \
hal/fifo/ramfc_tu104.c \
hal/fifo/ramin_tu104.c \
hal/fifo/channel_gv100.c \
hal/fifo/runlist_ram_tu104.c \
hal/fifo/runlist_fifo_gv100.c \
hal/fifo/runlist_fifo_tu104.c \
hal/fifo/fifo_intr_gv100.c \
hal/netlist/netlist_gv100.c \
hal/netlist/netlist_tu104.c \
hal/nvdec/nvdec_tu104.c \
hal/gsp/gsp_gv100.c \
hal/sec2/sec2_gp106.c \
hal/sec2/sec2_tu104.c
hal/sec2/sec2_tu104.c \
hal/pmu/pmu_tu104.c \
hal/pramin/pramin_gv100.c \
hal/pramin/pramin_tu104.c \
hal/bios/bios_tu104.c \
hal/top/top_gv100.c
endif

6
drivers/gpu/nvgpu/common/acr/acr.c
View File

@@ -30,9 +30,11 @@
#include "acr_priv.h"
#include "acr_sw_gm20b.h"
#include "acr_sw_gp10b.h"
#include "acr_sw_gv100.h"
#include "acr_sw_gv11b.h"
#ifdef NVGPU_DGPU_SUPPORT
#include "acr_sw_gv100.h"
#include "acr_sw_tu104.h"
#endif
/* ACR public API's */
bool nvgpu_acr_is_lsf_lazy_bootstrap(struct gk20a *g, struct nvgpu_acr *acr,
@@ -140,12 +142,14 @@ int nvgpu_acr_init(struct gk20a *g, struct nvgpu_acr **acr)
case NVGPU_GPUID_GV11B:
nvgpu_gv11b_acr_sw_init(g, *acr);
break;
#ifdef NVGPU_DGPU_SUPPORT
case NVGPU_GPUID_GV100:
nvgpu_gv100_acr_sw_init(g, *acr);
break;
case NVGPU_GPUID_TU104:
nvgpu_tu104_acr_sw_init(g, *acr);
break;
#endif
default:
nvgpu_kfree(g, *acr);
err = -EINVAL;

4
drivers/gpu/nvgpu/common/falcon/falcon.c
View File

@@ -24,8 +24,10 @@
#include <nvgpu/falcon.h>
#include "falcon_sw_gk20a.h"
#ifdef NVGPU_DGPU_SUPPORT
#include "falcon_sw_gv100.h"
#include "falcon_sw_tu104.h"
#endif
/* Delay depends on memory size and pwr_clk
* delay = (MAX {IMEM_SIZE, DMEM_SIZE} * 64 + 1) / pwr_clk
@@ -690,12 +692,14 @@ static int falcon_sw_init(struct gk20a *g, struct nvgpu_falcon *flcn)
case NVGPU_GPUID_GV11B:
gk20a_falcon_sw_init(flcn);
break;
#ifdef NVGPU_DGPU_SUPPORT
case NVGPU_GPUID_GV100:
gv100_falcon_sw_init(flcn);
break;
case NVGPU_GPUID_TU104:
tu104_falcon_sw_init(flcn);
break;
#endif
default:
err = -EINVAL;
nvgpu_err(g, "no support for GPUID %x", ver);

4
drivers/gpu/nvgpu/common/pmu/lsfm/lsfm.c
View File

@@ -29,8 +29,10 @@
#include "lsfm_sw_gm20b.h"
#include "lsfm_sw_gp10b.h"
#ifdef NVGPU_DGPU_SUPPORT
#include "lsfm_sw_gv100.h"
#include "lsfm_sw_tu104.h"
#endif
static bool is_lsfm_supported(struct gk20a *g,
struct nvgpu_pmu *pmu, struct nvgpu_pmu_lsfm *lsfm)
@@ -151,12 +153,14 @@ int nvgpu_pmu_lsfm_init(struct gk20a *g, struct nvgpu_pmu_lsfm **lsfm)
case NVGPU_GPUID_GV11B:
nvgpu_gp10b_lsfm_sw_init(g, *lsfm);
break;
#ifdef NVGPU_DGPU_SUPPORT
case NVGPU_GPUID_GV100:
nvgpu_gv100_lsfm_sw_init(g, *lsfm);
break;
case NVGPU_GPUID_TU104:
nvgpu_tu104_lsfm_sw_init(g, *lsfm);
break;
#endif
default:
nvgpu_kfree(g, *lsfm);
err = -EINVAL;

6
drivers/gpu/nvgpu/hal/init/hal_init.c
View File

@@ -30,9 +30,11 @@
#include "hal_gm20b.h"
#include "hal_gp10b.h"
#include "hal_gv100.h"
#include "hal_gv11b.h"
#ifdef NVGPU_DGPU_SUPPORT
#include "hal_gv100.h"
#include "hal_tu104.h"
#endif
int nvgpu_init_hal(struct gk20a *g)
{
@@ -62,6 +64,7 @@ int nvgpu_init_hal(struct gk20a *g)
return -ENODEV;
}
break;
#ifdef NVGPU_DGPU_SUPPORT
case NVGPU_GPUID_GV100:
if (gv100_init_hal(g) != 0) {
return -ENODEV;
@@ -73,6 +76,7 @@ int nvgpu_init_hal(struct gk20a *g)
return -ENODEV;
}
break;
#endif
#endif
default:
nvgpu_err(g, "no support for %x", ver);

4
drivers/gpu/nvgpu/hal/pramin/pramin_init.c
View File

@@ -24,8 +24,10 @@
#include "pramin_init.h"
#include "pramin_gp10b.h"
#ifdef NVGPU_DGPU_SUPPORT
#include "pramin_gv100.h"
#include "pramin_tu104.h"
#endif
void nvgpu_pramin_ops_init(struct gk20a *g)
{
@@ -35,12 +37,14 @@ void nvgpu_pramin_ops_init(struct gk20a *g)
case NVGPU_GPUID_GP10B:
g->ops.pramin.data032_r = gp10b_pramin_data032_r;
break;
#ifdef NVGPU_DGPU_SUPPORT
case NVGPU_GPUID_GV100:
g->ops.pramin.data032_r = gv100_pramin_data032_r;
break;
case NVGPU_GPUID_TU104:
g->ops.pramin.data032_r = tu104_pramin_data032_r;
break;
#endif
default:
g->ops.pramin.data032_r = NULL;
break;