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gpu: nvgpu: update the get_field_value macro emit

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This patch fixes the below misra violation for the get_field_value
macro emit.

misra_c_2012_rule_20_7_violation: Macro parameter expands into an
expression without being wrapped by parentheses.

Jira NVGPU-3881

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I0ab94a0b6b6bf67c1dddb96a99a6a5cd647b948e
Reviewed-on: https://git-master.nvidia.com/r/2181761
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Debarshi Dutta
2019-08-23 11:55:46 +05:30
committed by mobile promotions
parent 93b168cc8c
commit 0a9f633fc3
7 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_fifo_gk20a.h
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@@ -149,7 +149,7 @@
#define fifo_intr_pbdma_id_status_f(v, i)\
((U32(v) & 0x1U) << (0U + (i)*1U))
#define fifo_intr_pbdma_id_status_v(r, i)\
(((r) >> (0U + i*1U)) & 0x1U)
(((r) >> (0U + (i)*1U)) & 0x1U)
#define fifo_intr_pbdma_id_status__size_1_v() (0x00000001U)
#define fifo_intr_runlist_r() (0x00002a00U)
#define fifo_fb_timeout_r() (0x00002a04U)

2
drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_fifo_gm20b.h
View File

@@ -138,7 +138,7 @@
#define fifo_intr_pbdma_id_status_f(v, i)\
((U32(v) & 0x1U) << (0U + (i)*1U))
#define fifo_intr_pbdma_id_status_v(r, i)\
(((r) >> (0U + i*1U)) & 0x1U)
(((r) >> (0U + (i)*1U)) & 0x1U)
#define fifo_intr_pbdma_id_status__size_1_v() (0x00000001U)
#define fifo_intr_runlist_r() (0x00002a00U)
#define fifo_fb_timeout_r() (0x00002a04U)

2
drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_fuse_gm20b.h
View File

@@ -82,7 +82,7 @@
(nvgpu_safe_add_u32(0x00021d70U, nvgpu_safe_mult_u32((i), 4U)))
#define fuse_status_opt_fbp_r() (0x00021d38U)
#define fuse_status_opt_fbp_idx_v(r, i)\
(((r) >> (0U + i*1U)) & 0x1U)
(((r) >> (0U + (i)*1U)) & 0x1U)
#define fuse_opt_sec_debug_en_r() (0x00021218U)
#define fuse_opt_priv_sec_en_r() (0x00021434U)
#endif

2
drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fifo_gp10b.h
View File

@@ -139,7 +139,7 @@
#define fifo_intr_pbdma_id_status_f(v, i)\
((U32(v) & 0x1U) << (0U + (i)*1U))
#define fifo_intr_pbdma_id_status_v(r, i)\
(((r) >> (0U + i*1U)) & 0x1U)
(((r) >> (0U + (i)*1U)) & 0x1U)
#define fifo_intr_pbdma_id_status__size_1_v() (0x00000001U)
#define fifo_intr_runlist_r() (0x00002a00U)
#define fifo_fb_timeout_r() (0x00002a04U)

2
drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h
View File

@@ -82,7 +82,7 @@
(nvgpu_safe_add_u32(0x00021d70U, nvgpu_safe_mult_u32((i), 4U)))
#define fuse_status_opt_fbp_r() (0x00021d38U)
#define fuse_status_opt_fbp_idx_v(r, i)\
(((r) >> (0U + i*1U)) & 0x1U)
(((r) >> (0U + (i)*1U)) & 0x1U)
#define fuse_opt_ecc_en_r() (0x00021228U)
#define fuse_opt_feature_fuses_override_disable_r() (0x000213f0U)
#define fuse_opt_sec_debug_en_r() (0x00021218U)

4
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h
View File

@@ -118,7 +118,7 @@
#define fifo_intr_ctxsw_timeout_engine_f(v, i)\
((U32(v) & 0x1U) << (0U + (i)*1U))
#define fifo_intr_ctxsw_timeout_engine_v(r, i)\
(((r) >> (0U + i*1U)) & 0x1U)
(((r) >> (0U + (i)*1U)) & 0x1U)
#define fifo_intr_ctxsw_timeout_engine__size_1_v() (0x00000020U)
#define fifo_intr_ctxsw_timeout_engine_pending_v() (0x00000001U)
#define fifo_intr_ctxsw_timeout_engine_pending_f(i)\
@@ -141,7 +141,7 @@
#define fifo_intr_pbdma_id_status_f(v, i)\
((U32(v) & 0x1U) << (0U + (i)*1U))
#define fifo_intr_pbdma_id_status_v(r, i)\
(((r) >> (0U + i*1U)) & 0x1U)
(((r) >> (0U + (i)*1U)) & 0x1U)
#define fifo_intr_pbdma_id_status__size_1_v() (0x00000003U)
#define fifo_intr_runlist_r() (0x00002a00U)
#define fifo_fb_timeout_r() (0x00002a04U)

2
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fuse_gv11b.h
View File

@@ -82,7 +82,7 @@
(nvgpu_safe_add_u32(0x00021d70U, nvgpu_safe_mult_u32((i), 4U)))
#define fuse_status_opt_fbp_r() (0x00021d38U)
#define fuse_status_opt_fbp_idx_v(r, i)\
(((r) >> (0U + i*1U)) & 0x1U)
(((r) >> (0U + (i)*1U)) & 0x1U)
#define fuse_opt_ecc_en_r() (0x00021228U)
#define fuse_opt_feature_fuses_override_disable_r() (0x000213f0U)
#define fuse_opt_sec_debug_en_r() (0x00021218U)