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gpu: nvgpu: fix gm20b round rate ops

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Make the clk_round_rate ops consider the max rate supported by DVFS
while calculating the max frequency.

Bug 200233943

Change-Id: Ib36a40a29cb16231dd1442aa652a20819e0f4016
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1281552
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Srikar Srimath Tirumala
2017-01-06 14:36:09 -08:00
committed by mobile promotions
parent 60c6621297
commit 0aba2e99d0
1 changed files with 6 additions and 4 deletions
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10
drivers/gpu/nvgpu/gm20b/clk_gm20b.c
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@@ -1266,13 +1266,16 @@ static long gm20b_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
struct clk_gk20a *clk = to_clk_gk20a(hw);
u32 freq, old_freq;
u32 freq;
struct pll tmp_pll;
unsigned long maxrate;
maxrate = tegra_dvfs_get_maxrate(clk_get_parent(clk->tegra_clk));
if (rate > maxrate)
rate = maxrate;
mutex_lock(&clk->clk_mutex);
old_freq = clk->gpc_pll.freq;
freq = rate_gpu_to_gpc2clk(rate);
if (freq > gpc_pll_params.max_freq)
freq = gpc_pll_params.max_freq;
else if (freq < gpc_pll_params.min_freq)
@@ -1280,7 +1283,6 @@ static long gm20b_round_rate(struct clk_hw *hw, unsigned long rate,
tmp_pll = clk->gpc_pll;
clk_config_pll(clk, &tmp_pll, &gpc_pll_params, &freq, true);
mutex_unlock(&clk->clk_mutex);
return rate_gpc2clk_to_gpu(tmp_pll.freq);