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gpu: nvgpu: Update eng_buf_load message for T18x

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eng_buf_load message structure for T18x is updated. Update kernel
code to follow.

Bug 200119744

Change-Id: Ib86c3e54ed60704470b29d9f7de612697cfd54a3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/764458
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Tested-by: Mahantesh Kumbar <mkumbar@nvidia.com>
This commit is contained in:
Terje Bergstrom
2015-06-30 13:35:14 -07:00
parent 417bc8361a
commit 0c25c820d7
2 changed files with 10 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
View File

@@ -839,7 +839,7 @@ static void pg_cmd_eng_buf_load_set_buf_size_v0(struct pmu_pg_cmd *pg,
static void pg_cmd_eng_buf_load_set_buf_size_v1(struct pmu_pg_cmd *pg,
u16 value)
{
pg->eng_buf_load_v1.buf_size = value;
pg->eng_buf_load_v1.dma_desc.dma_size = value;
}
static void pg_cmd_eng_buf_load_set_dma_base_v0(struct pmu_pg_cmd *pg,
@@ -850,8 +850,8 @@ static void pg_cmd_eng_buf_load_set_dma_base_v0(struct pmu_pg_cmd *pg,
static void pg_cmd_eng_buf_load_set_dma_base_v1(struct pmu_pg_cmd *pg,
u32 value)
{
pg->eng_buf_load_v1.dma_addr.dma_base = value;
pg->eng_buf_load_v1.dma_addr.dma_base1 = 0;
pg->eng_buf_load_v1.dma_desc.dma_addr.lo |= u64_lo32(value << 8);
pg->eng_buf_load_v1.dma_desc.dma_addr.hi |= u64_hi32(value << 8);
}
static void pg_cmd_eng_buf_load_set_dma_offset_v0(struct pmu_pg_cmd *pg,
@@ -862,7 +862,7 @@ static void pg_cmd_eng_buf_load_set_dma_offset_v0(struct pmu_pg_cmd *pg,
static void pg_cmd_eng_buf_load_set_dma_offset_v1(struct pmu_pg_cmd *pg,
u8 value)
{
pg->eng_buf_load_v1.dma_addr.dma_offset = value;
pg->eng_buf_load_v1.dma_desc.dma_addr.lo |= value;
}
static void pg_cmd_eng_buf_load_set_dma_idx_v0(struct pmu_pg_cmd *pg,
@@ -873,7 +873,7 @@ static void pg_cmd_eng_buf_load_set_dma_idx_v0(struct pmu_pg_cmd *pg,
static void pg_cmd_eng_buf_load_set_dma_idx_v1(struct pmu_pg_cmd *pg,
u8 value)
{
pg->eng_buf_load_v1.dma_idx = value;
pg->eng_buf_load_v1.dma_desc.dma_idx = value;
}

8
drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
View File

@@ -680,9 +680,11 @@ struct pmu_pg_cmd_eng_buf_load_v1 {
u8 engine_id;
u8 buf_idx;
u8 pad;
u16 buf_size;
struct falc_dma_addr dma_addr; /* 256-byte block address */
u8 dma_idx;
struct flcn_mem_desc {
struct falc_u64 dma_addr;
u16 dma_size;
u8 dma_idx;
} dma_desc;
};
enum {