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gpu: nvgpu: ltc: remove multiple hw header dependency

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Added new hal in top unit to get number of ltcs and
used this hal in ltc unit. With this one hardware header
dependency hw_top_gxxxx.h from ltc unit is removed.

Also used priv_ring unit hal enum_ltc to avoid dependency
on hw_pri_ringmaster_gxxxx.h.

JIRA NVGPU-3445

Change-Id: I5b6a2d87ecc663ce5b9fb85ff1e1fe97d7eb6d9a
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2170400
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seshendra Gadagottu
2019-08-07 13:24:18 -07:00
committed by mobile promotions
parent 4899875f00
commit 0e873d6348
16 changed files with 21 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/hal/init/hal_gm20b.c
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@@ -1045,6 +1045,7 @@ static const struct gpu_ops gm20b_ops = {
.get_max_fbps_count = gm20b_top_get_max_fbps_count,
.get_max_ltc_per_fbp = gm20b_top_get_max_ltc_per_fbp,
.get_max_lts_per_ltc = gm20b_top_get_max_lts_per_ltc,
.get_num_ltcs = gm20b_top_get_num_ltcs,
},
.chip_init_gpu_characteristics = nvgpu_init_gpu_characteristics,
.get_litter_value = gm20b_get_litter_value,

1
drivers/gpu/nvgpu/hal/init/hal_gp10b.c
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@@ -1140,6 +1140,7 @@ static const struct gpu_ops gp10b_ops = {
.get_max_fbps_count = gm20b_top_get_max_fbps_count,
.get_max_ltc_per_fbp = gm20b_top_get_max_ltc_per_fbp,
.get_max_lts_per_ltc = gm20b_top_get_max_lts_per_ltc,
.get_num_ltcs = gm20b_top_get_num_ltcs,
},
.chip_init_gpu_characteristics = gp10b_init_gpu_characteristics,
.get_litter_value = gp10b_get_litter_value,

1
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
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@@ -1338,6 +1338,7 @@ static const struct gpu_ops gv11b_ops = {
.get_max_fbps_count = gm20b_top_get_max_fbps_count,
.get_max_ltc_per_fbp = gm20b_top_get_max_ltc_per_fbp,
.get_max_lts_per_ltc = gm20b_top_get_max_lts_per_ltc,
.get_num_ltcs = gm20b_top_get_num_ltcs,
.get_num_lce = gv11b_top_get_num_lce,
},
.chip_init_gpu_characteristics = gv11b_init_gpu_characteristics,

1
drivers/gpu/nvgpu/hal/init/hal_tu104.c
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@@ -1455,6 +1455,7 @@ static const struct gpu_ops tu104_ops = {
.get_max_fbpas_count = gv100_top_get_max_fbpas_count,
.get_max_ltc_per_fbp = gm20b_top_get_max_ltc_per_fbp,
.get_max_lts_per_ltc = gm20b_top_get_max_lts_per_ltc,
.get_num_ltcs = gm20b_top_get_num_ltcs,
.get_num_lce = gv11b_top_get_num_lce,
},
.chip_init_gpu_characteristics = tu104_init_gpu_characteristics,

6
drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c
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@@ -37,8 +37,6 @@
#include <nvgpu/safe_ops.h>
#include <nvgpu/hw/gm20b/hw_ltc_gm20b.h>
#include <nvgpu/hw/gm20b/hw_top_gm20b.h>
#include <nvgpu/hw/gm20b/hw_pri_ringmaster_gm20b.h>
#include "ltc_gm20b.h"
@@ -49,8 +47,8 @@ void gm20b_ltc_init_fs_state(struct gk20a *g)
nvgpu_log_info(g, "initialize gm20b l2");
g->ltc->max_ltc_count = gk20a_readl(g, top_num_ltcs_r());
g->ltc->ltc_count = gk20a_readl(g, pri_ringmaster_enum_ltc_r());
g->ltc->max_ltc_count = g->ops.top.get_num_ltcs(g);
g->ltc->ltc_count = g->ops.priv_ring.enum_ltc(g);
nvgpu_log_info(g, "%d ltcs out of %d", g->ltc->ltc_count,
g->ltc->max_ltc_count);

2
drivers/gpu/nvgpu/hal/ltc/ltc_gm20b_dbg.c
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@@ -37,8 +37,6 @@
#include <nvgpu/safe_ops.h>
#include <nvgpu/hw/gm20b/hw_ltc_gm20b.h>
#include <nvgpu/hw/gm20b/hw_top_gm20b.h>
#include <nvgpu/hw/gm20b/hw_pri_ringmaster_gm20b.h>
#include "ltc_gm20b.h"

2
drivers/gpu/nvgpu/hal/ltc/ltc_gm20b_fusa.c
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@@ -37,8 +37,6 @@
#include <nvgpu/safe_ops.h>
#include <nvgpu/hw/gm20b/hw_ltc_gm20b.h>
#include <nvgpu/hw/gm20b/hw_top_gm20b.h>
#include <nvgpu/hw/gm20b/hw_pri_ringmaster_gm20b.h>
#include "ltc_gm20b.h"

1
drivers/gpu/nvgpu/hal/ltc/ltc_gv11b.c
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@@ -30,7 +30,6 @@
#include "ltc_gv11b.h"
#include <nvgpu/hw/gv11b/hw_ltc_gv11b.h>
#include <nvgpu/hw/gv11b/hw_top_gv11b.h>
#include <nvgpu/utils.h>

3
drivers/gpu/nvgpu/hal/ltc/ltc_gv11b_fusa.c
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@@ -30,7 +30,6 @@
#include "ltc_gv11b.h"
#include <nvgpu/hw/gv11b/hw_ltc_gv11b.h>
#include <nvgpu/hw/gv11b/hw_top_gv11b.h>
#include <nvgpu/utils.h>
@@ -103,7 +102,7 @@ void gv11b_ltc_init_fs_state(struct gk20a *g)
nvgpu_log_info(g, "initialize gv11b l2");
g->ltc->max_ltc_count = gk20a_readl(g, top_num_ltcs_r());
g->ltc->max_ltc_count = g->ops.top.get_num_ltcs(g);
g->ltc->ltc_count = g->ops.priv_ring.enum_ltc(g);
nvgpu_log_info(g, "%u ltcs out of %u", g->ltc->ltc_count,
g->ltc->max_ltc_count);

1
drivers/gpu/nvgpu/hal/top/top_gm20b.h
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@@ -47,5 +47,6 @@ u32 gm20b_top_get_max_tpc_per_gpc_count(struct gk20a *g);
u32 gm20b_top_get_max_fbps_count(struct gk20a *g);
u32 gm20b_top_get_max_ltc_per_fbp(struct gk20a *g);
u32 gm20b_top_get_max_lts_per_ltc(struct gk20a *g);
u32 gm20b_top_get_num_ltcs(struct gk20a *g);
#endif

8
drivers/gpu/nvgpu/hal/top/top_gm20b_fusa.c
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@@ -120,3 +120,11 @@ u32 gm20b_top_get_max_lts_per_ltc(struct gk20a *g)
tmp = nvgpu_readl(g, top_slices_per_ltc_r());
return top_slices_per_ltc_value_v(tmp);
}
u32 gm20b_top_get_num_ltcs(struct gk20a *g)
{
u32 tmp;
tmp = nvgpu_readl(g, top_num_ltcs_r());
return top_num_ltcs_value_v(tmp);
}

1
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
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@@ -1875,6 +1875,7 @@ struct gpu_ops {
u32 (*get_max_fbpas_count)(struct gk20a *g);
u32 (*get_max_ltc_per_fbp)(struct gk20a *g);
u32 (*get_max_lts_per_ltc)(struct gk20a *g);
u32 (*get_num_ltcs)(struct gk20a *g);
u32 (*get_num_lce)(struct gk20a *g);
u32 (*read_top_scratch1_reg)(struct gk20a *g);
u32 (*top_scratch1_devinit_completed)(struct gk20a *g,

1
drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_top_gm20b.h
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@@ -70,6 +70,7 @@
#define top_slices_per_ltc_r() (0x0002245cU)
#define top_slices_per_ltc_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_num_ltcs_r() (0x00022454U)
#define top_num_ltcs_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_device_info_r(i)\
(nvgpu_safe_add_u32(0x00022700U, nvgpu_safe_mult_u32((i), 4U)))
#define top_device_info__size_1_v() (0x00000040U)

1
drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_top_gp10b.h
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@@ -70,6 +70,7 @@
#define top_slices_per_ltc_r() (0x0002245cU)
#define top_slices_per_ltc_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_num_ltcs_r() (0x00022454U)
#define top_num_ltcs_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_device_info_r(i)\
(nvgpu_safe_add_u32(0x00022700U, nvgpu_safe_mult_u32((i), 4U)))
#define top_device_info__size_1_v() (0x00000040U)

1
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_top_gv11b.h
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@@ -70,6 +70,7 @@
#define top_slices_per_ltc_r() (0x0002245cU)
#define top_slices_per_ltc_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_num_ltcs_r() (0x00022454U)
#define top_num_ltcs_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_num_ces_r() (0x00022444U)
#define top_num_ces_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_device_info_r(i)\

1
drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_top_tu104.h
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@@ -72,6 +72,7 @@
#define top_slices_per_ltc_r() (0x0002245cU)
#define top_slices_per_ltc_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_num_ltcs_r() (0x00022454U)
#define top_num_ltcs_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_num_ces_r() (0x00022444U)
#define top_num_ces_value_v(r) (((r) >> 0U) & 0x1fU)
#define top_device_info_r(i)\