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gpu: nvgpu: Remove fault_buf_status array
Now that we have a consistent way to check if a mem allocation is valid this array is not necessary. The code can simply check the validity of the nvgpu_mem. Change-Id: I6aaf563ddc314cf86a2c2b98f7eb75fa7a9a1ad9 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1641637 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -126,8 +126,6 @@ static void gv11b_mm_mmu_hw_fault_buf_init(struct gk20a *g,
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return;
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}
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g->mm.hw_fault_buf_status[NONREPLAY_REG_INDEX] =
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HW_FAULT_BUF_STATUS_ALLOC_TRUE;
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*hub_intr_types |= HUB_INTR_TYPE_NONREPLAY;
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err = nvgpu_dma_alloc_map_sys(vm, fb_size,
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@@ -138,8 +136,7 @@ static void gv11b_mm_mmu_hw_fault_buf_init(struct gk20a *g,
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/* Fault will be snapped in pri reg but not in buffer */
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return;
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}
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g->mm.hw_fault_buf_status[REPLAY_REG_INDEX] =
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HW_FAULT_BUF_STATUS_ALLOC_TRUE;
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*hub_intr_types |= HUB_INTR_TYPE_REPLAY;
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}
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@@ -165,21 +162,13 @@ static void gv11b_mm_mmu_hw_fault_buf_deinit(struct gk20a *g)
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FAULT_BUF_DISABLED);
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}
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if (g->mm.hw_fault_buf_status[NONREPLAY_REG_INDEX] ==
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HW_FAULT_BUF_STATUS_ALLOC_TRUE) {
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if (nvgpu_mem_is_valid(
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&g->mm.hw_fault_buf[FAULT_TYPE_OTHER_AND_NONREPLAY]))
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nvgpu_dma_unmap_free(vm,
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&g->mm.hw_fault_buf[FAULT_TYPE_OTHER_AND_NONREPLAY]);
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g->mm.hw_fault_buf_status[NONREPLAY_REG_INDEX] =
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HW_FAULT_BUF_STATUS_ALLOC_FALSE;
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}
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if (g->mm.hw_fault_buf_status[REPLAY_REG_INDEX] ==
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HW_FAULT_BUF_STATUS_ALLOC_TRUE) {
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if (nvgpu_mem_is_valid(&g->mm.hw_fault_buf[FAULT_TYPE_REPLAY]))
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nvgpu_dma_unmap_free(vm,
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&g->mm.hw_fault_buf[FAULT_TYPE_REPLAY]);
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g->mm.hw_fault_buf_status[REPLAY_REG_INDEX] =
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HW_FAULT_BUF_STATUS_ALLOC_FALSE;
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}
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}
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void gv11b_mm_remove_bar2_vm(struct gk20a *g)
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@@ -196,14 +185,11 @@ void gv11b_mm_remove_bar2_vm(struct gk20a *g)
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static void gv11b_mm_mmu_fault_setup_hw(struct gk20a *g)
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{
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if (g->mm.hw_fault_buf_status[NONREPLAY_REG_INDEX] ==
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HW_FAULT_BUF_STATUS_ALLOC_TRUE) {
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if (nvgpu_mem_is_valid(
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&g->mm.hw_fault_buf[FAULT_TYPE_OTHER_AND_NONREPLAY]))
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gv11b_fb_fault_buf_configure_hw(g, NONREPLAY_REG_INDEX);
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}
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if (g->mm.hw_fault_buf_status[REPLAY_REG_INDEX] ==
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HW_FAULT_BUF_STATUS_ALLOC_TRUE) {
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if (nvgpu_mem_is_valid(&g->mm.hw_fault_buf[FAULT_TYPE_REPLAY]))
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gv11b_fb_fault_buf_configure_hw(g, REPLAY_REG_INDEX);
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}
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}
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static int gv11b_mm_mmu_fault_setup_sw(struct gk20a *g)
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@@ -214,11 +200,6 @@ static int gv11b_mm_mmu_fault_setup_sw(struct gk20a *g)
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nvgpu_mutex_init(&g->mm.hub_isr_mutex);
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g->mm.hw_fault_buf_status[NONREPLAY_REG_INDEX] =
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HW_FAULT_BUF_STATUS_ALLOC_FALSE;
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g->mm.hw_fault_buf_status[REPLAY_REG_INDEX] =
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HW_FAULT_BUF_STATUS_ALLOC_FALSE;
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g->mm.hub_intr_types = HUB_INTR_TYPE_ECC_UNCORRECTED;
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err = gv11b_mm_mmu_fault_info_buf_init(g, &g->mm.hub_intr_types);
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@@ -1,6 +1,6 @@
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/*
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* GV11B MM
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -24,9 +24,6 @@
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#ifndef MM_GV11B_H
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#define MM_GV11B_H
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#define HW_FAULT_BUF_STATUS_ALLOC_TRUE 1
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#define HW_FAULT_BUF_STATUS_ALLOC_FALSE 0
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struct gk20a;
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struct nvgpu_mem;
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struct vm_gk20a;
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@@ -129,7 +129,6 @@ struct mm_gk20a {
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struct nvgpu_mem bar2_desc;
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struct nvgpu_mem hw_fault_buf[FAULT_TYPE_NUM];
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unsigned int hw_fault_buf_status[FAULT_TYPE_NUM];
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struct mmu_fault_info *fault_info[FAULT_TYPE_NUM];
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struct nvgpu_mutex hub_isr_mutex;
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u32 hub_intr_types;
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